solution - eee.hku.hkengg1203/sp18/handouts/engg1203hw1-sol.pdf · solution engg1203: introduction...

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ENGG1203: Introduction to Electrical and Electronic EngineeringSecond Semester, 2017–18

Homework 1Due: 15 Mar, 2018, 11:55pm

Instruction: Submit your answers electronically through Moodle. In Moodle, you must submit underthe Homework 1 link with the following files:

1. amon.circ for Question 3;2. ONE (1) PDF file containing answers to all remaining questions

Your homework will be graded electronically so you must submit your work as a PDF file. To generatePDF file from your computer, you may use one of the many free PDF creators available, e.g. PDFCreator(http://sourceforge.net/projects/pdfcreator), CutePDF Writer (http://www.cutepdf.com/Products/CutePDF/Writer.asp).

You need to design your circuit in Logisim for Question 3. Logisim can be downloaded freely fromhttp://www.cburch.com/logisim/. It runs on Linux, Mac, and Windows machines.

Question 1 Short QuestionsPart(a)Simplify each of the following Boolean expressions by using K-map. Show the completed K-map and theway you looped the ‘1’s.

Furthermore, based on your K-map, implement the expression using only 2-input AND gates, 2-inputOR gates, or NOT gates.

1. 𝑍 + 𝑋𝑌

http://sourceforge.net/projects/pdfcreator

http://www.cutepdf.com/Products/CutePDF/Writer.asp

http://www.cutepdf.com/Products/CutePDF/Writer.asp

http://www.cburch.com/logisim/

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ENGG1203: Introduction to Electrical and Electronic Engineering Homework 1

2. 𝑃 𝑄 + (𝑆 𝑄 + 𝑅 𝑆) (𝑃 + 𝑄)

3. (𝐴 𝐵 + 𝐶) (𝐴 + 𝐶)

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Part(b)Any combinational circuit can be represented either with a circuit schematic, a Boolean expression, or atruth table. In the following, you are given one representation of a circuit. Your task is to also representthe same circuit with the other 2 representations. In all cases, inputs are 𝐴, 𝐵, 𝐶, and 𝐷, while outputis always labeled as 𝑌 . Simplify your answer and write Boolean expressions in canonical SOP form.

(i) (ii)

𝑌 = 𝐴𝐵 + 𝐵 𝐶 𝐷 + 𝐴𝐷 + 𝐶 𝐷 (𝐴𝐶 + 𝐵 𝐷) 𝐴𝐷 + 𝐵𝐶 + 𝐵 𝐶 𝐷(iii) (iv)

𝐴 𝐵 𝐶 𝐷 𝑌0 0 0 0 10 0 0 1 10 0 1 0 10 0 1 1 10 1 0 0 10 1 0 1 10 1 1 0 00 1 1 1 01 0 0 0 01 0 0 1 01 0 1 0 11 0 1 1 01 1 0 0 01 1 0 1 01 1 1 0 01 1 1 1 0

𝐴 𝐵 𝐶 𝐷 𝑌0 0 0 0 10 0 0 1 00 0 1 0 10 0 1 1 00 1 0 0 10 1 0 1 10 1 1 0 10 1 1 1 11 0 0 0 11 0 0 1 01 0 1 0 11 0 1 1 01 1 0 0 01 1 0 1 11 1 1 0 01 1 1 1 1

(v) (vi)

A

B

C

D

Y

A

B

C

D

Y

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(i)

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(ii)

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(iii)

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(iv)

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(v)

(vi)

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Part(c)The following FSM implements a sequence detector that examines input 𝑋, which is a string of 0’sand 1’s, and generates an output 𝑌 , which gives a value of 1 when the pattern 010 is detected, and 0otherwise. The position of 𝑌 = 1 coincides with the last 1 detected in the pattern. For example:

X = 0 0 1 0 0 1 1 1 1 0 1 0 1 0 0 ...Y = 0 0 0 1 0 0 0 0 0 0 0 1 0 1 0 ...

Complete the following state machine such that it will correctly implement this sequence detector. Thetransitions are labeled with the notation “input / [output]”.

S0 S1 S20/[0] 1/[0]

0/[1]

1/[0] 0/[0]

1/[0]

Part(d)Draw the timing diagram of the following circuit:

A

Y

clk

B C

D

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ABCDY

clk

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Question 2 Complex Number ArithmeticYou would like to design a multiplier that multiplies two complex numbers. Let j =

√−1; engineers like

to use j instead of i because the latter is traditionally reserved to denote electric current. Let the twoinputs be 𝑎 + j𝑏 and 𝑐 + j𝑑, then your multiplier produces a complex number 𝑒 + j𝑓 such that

𝑒 + j𝑓 = (𝑎 + j𝑏) × (𝑐 + j𝑑)

and

{ 𝑒 = 𝑎𝑐 − 𝑏𝑑 (1a)𝑓 = 𝑎𝑑 + 𝑏𝑐 (1b)

To simplify the design, the complex numbers in your system have only limited range: For all complexnumbers 𝑥 + j𝑦 in the system, 𝑥, 𝑦 ∈ {−1, 0, 1}. Therefore, for example, 1 + j and −j are both validnumbers while 2 + j is not.

In your hardware system, each complex number is represented by 4 bits, with 2 bits representing thereal part (𝑥 of 𝑥 + j𝑦) in 2’s complement, and 2 bits representing the complex part (𝑦 of 𝑥 + j𝑦) in 2’scomplement.

Part(a) Real Number MultipliersThe first step in your design is to implement a real number multiplier (rm) that you will use to implementequation 1a and 1b. rm takes two 2-bit inputs 𝑚 (m1m0) and 𝑛 (n1n0) and produces a 2-bit output 𝑝(p1p0). Some examples on how it should behave:

𝑚 × 𝑛 = 𝑝−1 × 0 = 01 × −1 = −1

−1 × −1 = 1⋮

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Complete the following truth tables for rm relating p1 p0 to the input m1 m0 n1 n0. Remember: thenumbers 𝑚, 𝑛, 𝑝 are all encoded as 2-bit 2’s-complement numbers.

m1 m0 n1 n0 p1 p0

0 0 0 0 0 0

0 0 0 1 0 0

0 0 1 0 – –

0 0 1 1 0 0

0 1 0 0 0 0

0 1 0 1 0 1

0 1 1 0 – –

0 1 1 1 1 1

1 0 0 0 – –

1 0 0 1 – –

1 0 1 0 – –

1 0 1 1 – –

1 1 0 0 0 0

1 1 0 1 1 1

1 1 1 0 – –

1 1 1 1 0 1

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Part(b) K-map and MinimizationBased on your answer from the previous part, perform the following:

1. Draw the K-map for the signal p1;2. Derive the minimized Boolean expression for p1 using the above K-map;3. Express your answer in canonical SOP form.

00 01 11 10

10

11

01

00m1, m0

n1, n0

0 0 0 x

0 0 1 x

0 1 0 x

x x x x

m1 m0 n1 + m1 n1 n0

Part(c) Adder/SubtractorAnother component needed to implement equation 1a and 1b is a real value adder/subtractor (ras).Recall that in your system real numbers only take the values of {−1, 0, 1}. If the result of an add orsubtract is 2 or −2, then the result will wrap back to 0. For example:

−1 + 1 = 01 + 1 = 0

−1 − 0 = −1−1 + (−1) = 0

The design of ras has 5 input signals and 2 output signals with the following meanings:

Direction Name Description

input isSub ‘1’ to perform subtraction, ‘0’ to performaddition

input s1 s0 2-bit input value in 2’s complementinput t1 t0 2-bit input value in 2’s complement

output r1 r0 2-bit output value in 2’s complement

Complete the following truth table for ras:

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isSub s1 s0 t1 t0 r1 r0

0 0 0 0 0 0 0

0 0 0 0 1 0 1

0 0 0 1 0 – –

0 0 0 1 1 1 1

0 0 1 0 0 0 1

0 0 1 0 1 0 0

0 0 1 1 0 – –

0 0 1 1 1 0 0

0 1 0 0 0 – –

0 1 0 0 1 – –

0 1 0 1 0 – –

0 1 0 1 1 – –

0 1 1 0 0 1 1

0 1 1 0 1 0 0

0 1 1 1 0 – –

0 1 1 1 1 0 0

1 0 0 0 0 0 0

1 0 0 0 1 1 1

1 0 0 1 0 – –

1 0 0 1 1 0 1

1 0 1 0 0 0 1

1 0 1 0 1 0 0

1 0 1 1 0 – –

1 0 1 1 1 0 0

1 1 0 0 0 – –

1 1 0 0 1 – –

1 1 0 1 0 – –

1 1 0 1 1 – –

1 1 1 0 0 1 1

1 1 1 0 1 0 0

1 1 1 1 0 – –

1 1 1 1 1 0 0

Part(d) Putting it TogetherIn the following space, draw the design of your complex number multiplier (cm) using the real numbermultiplier (rm) and the real number adder/subtractor (ras) you designed above as components. Write1 or 0 if you need to pas a constant ‘1’ or ‘0’ to the circuit.

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d1d0

c1c0

b1b0

a1a0

f1f0

e1e0

rm

m1m0

n1n0p1p0

rm

m1m0

n1n0p1p0

rm

m1m0

n1n0p1p0

rm

m1m0

n1n0p1p0

ras

s1s0

t1t0r1r0

isSub

ras

s1s0

t1t0r1r0

isSub

1

0

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Question 3 Alfred the Smart Home ButlerYou are the chief architecture for Alfred, your company’s next flagship product that acts as a voice-controlled smart home speaker. Alfred is a smart speaker that can play music while controlling allparts of your smart home such lighting and air conditioning. It can process natural language andcommunicates with you with normal voice conversation. To initiate a voice command, you need to drawAlfred’s attention by saying one of the following magic phrases:

“Hello Alfred”

With the above, you can then ask Alfred questions such as, “Hello Alfred, what is the weather today?”or “Hello Alfred, turn off the light in kitchen please.”

In this question, you will design Alfred’s monitoring logic that constantly listening to the environmentfor the magic phrases. As an elite ENGG1203 student, you have decided to implement this logic as afinite state machine.

Your monitoring module is connected to the rest of the system as follow.

amon

microphone

h

a

timer

s t

Query Process

p

f

Figure 1: Overview of the Alfred system, showing the connection between the monitoring module andthe rest of the system.

As shown in the diagram your monitoring module has the following input and output signals:

Dir Name Descriptioninput h 1: the word “Hello” is detected, 0 otherwise

a 1: the word “Alfred” is detected, 0 otherwiset 1: if timer is expired, 0 otherwisef 1: finished processing voice query, 0 otherwise

output s 1: start external timer countdown, 0 otherwisep 1: tell voice query module to process voice command, 0 otherwise

A note about the operation of Alfred: amon constantly monitor for the phrase “Hello Alfred” from theenvironment. If the phrase is detected, it assert the signal p to start the subsequent query process (e.g.What is the time now?). It relies on the external timer to determine the time between whe the word“Hello” and “Alfred” are heard. If, for example, it hears “Hello” but never hear “Alfred” within certaintime as determined by the timer then it should ignore the “Hello” and go back to sleep. For example, ifsomeone say,

“Hello Peter, are you going to meet Alfred today?”

amon should not regard it has a wakeup phrase.

To start the timer, amon should set the signal s to ‘1’ for one cycle. After a specific time, the signal twill be set to ‘1’ by the timer for one cycle. If you assert s before the timer expires, it will simply restartthe timer from the begining.

Once the Query processing module has completed its task, it assert the signal f for one cycle.

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Part(a)Your amon FSM, has the following states defined:

State DescriptionSleep Alfred is sleeping, waiting for the command “Hello Alfred”Hello Alfred is half awake after hearing “Hello”Awake Alfred is awake after successfully detecting a magic phrase

Sleep Hello

Awake

h/[0, 0]

h/[1, 0]

(h + t) a/[h, 0]

t h a/[0, 0]

a /[0, 1]

f/[0, f]

f /[0, 0]

Part(b)You are implementing the above FSM in hardware. You are encoding the states with 2 bits (s2 s1 s0)using the following encoding:

State Encodings1 s0

Sleep 0 0Hello 0 1Awake 1 0

Complete the next state and output logic table for your FSM in the following page. For don’t caresituations, write down ’X’ in the corresponding space.

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s1 s0 h a t f ns1 ns0 s p0 0 0 0 0 0 0 0 0 00 0 0 0 0 1 0 0 0 00 0 0 0 1 0 0 0 0 00 0 0 0 1 1 0 0 0 00 0 0 1 0 0 0 0 0 00 0 0 1 0 1 0 0 0 00 0 0 1 1 0 0 0 0 00 0 0 1 1 1 0 0 0 00 0 1 0 0 0 0 1 1 00 0 1 0 0 1 0 1 1 00 0 1 0 1 0 0 1 1 00 0 1 0 1 1 0 1 1 00 0 1 1 0 0 0 1 1 00 0 1 1 0 1 0 1 1 00 0 1 1 1 0 0 1 1 00 0 1 1 1 1 0 1 1 00 1 0 0 0 0 0 1 1 00 1 0 0 0 1 0 1 1 00 1 0 0 1 0 0 0 0 00 1 0 0 1 1 0 0 0 00 1 0 1 0 0 1 0 0 10 1 0 1 0 1 1 0 0 10 1 0 1 1 0 1 0 0 10 1 0 1 1 1 1 0 0 10 1 1 0 0 0 0 1 1 00 1 1 0 0 1 0 1 1 00 1 1 0 1 0 0 1 1 00 1 1 0 1 1 0 1 1 00 1 1 1 0 0 1 0 0 10 1 1 1 0 1 1 0 0 10 1 1 1 1 0 1 0 0 10 1 1 1 1 1 1 0 0 11 0 0 0 0 0 1 0 0 11 0 0 0 0 1 0 0 0 01 0 0 0 1 0 1 0 0 11 0 0 0 1 1 0 0 0 01 0 0 1 0 0 1 0 0 11 0 0 1 0 1 0 0 0 01 0 0 1 1 0 1 0 0 11 0 0 1 1 1 0 0 0 01 0 1 0 0 0 1 0 0 11 0 1 0 0 1 0 0 0 01 0 1 0 1 0 1 0 0 11 0 1 0 1 1 0 0 0 01 0 1 1 0 0 1 0 0 11 0 1 1 0 1 0 0 0 01 0 1 1 1 0 1 0 0 11 0 1 1 1 1 0 0 0 0

Part(c)Implement the above FSM in Logisim. Apart from the I/O described above, your machine should alsoinclude a clock input clk, and a reset input clr. The following table summarizes the input/output portsof your state machine. The column “Order” indicates the order of the pin in the circuit symbol.

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Direction Order Name Logisim Typeinput 1 h Pin

2 a Pin3 t Pin4 f Pin5 clk Pin6 clr Pin

output 1 s Pin2 p Pin

Your circuit will be graded automatically, so it is very important for you to use the exact pin names inthe above table in your circuit. Download the file http://www.eee.hku.hk/~engg1203/sp18/handouts/hw1src.zip. You may use the included amon.circ as a template for your design. You may find the fileamon-test.circ useful for testing your circuit. Put the two files (amon.circ and amon-test.circ) inthe same directory for the file amon-test.circ to run.

Save your answer in amon.circ and submit this file via Moodle.

Part(d) Optional: Just for FunName the comic/movie that may have inspired the product name Alfred.

Batman. In the comic/movie Batman, the main character Batman is called Bruce Wayne, whohas a smart butler at home named Alfred Pennyworth.

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http://www.eee.hku.hk/~engg1203/sp18/handouts/hw1src.zip

http://www.eee.hku.hk/~engg1203/sp18/handouts/hw1src.zip

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Question 4 Number Systems in ComputersPart(a)Represent the numbers 12, -5, 332, -9, -1.25, 𝜋 in the following formats. Write N/A if the number cannotbe represented in that format:

(i) 6-bit unsigned number

(ii) 7-bit 2’s complement number

(iii) 10-bit 1’s complement number

(iv) 8-bit sign-magnitude number with “1” as the most significant bit representing a negative number.

Number 6-bit unsigned 7-bit 2’scomplement

10-bit 1’scomplement

8-bitsign-magnitude

12 001100 0001100 0000001100 00001100−5 N/A 1111011 1111111010 10000101332 N/A N/A 0101001100 N/A−9 N/A 1110111 1111110110 10001001

−1.25 N/A N/A N/A N/A𝜋 N/A N/A N/A N/A

Part(b)Perform the calculation if the 9-bit numbers are in the following formats: (i) 9-bit unsigned number;(ii) 9-bit 1’s complement; (iii) 9-bit 2’s complement; (iv) 9-bit sign-magnitude, with a “1” as the mostsignificant bit representing a negative number. Write your answer in the following table. Indicate with“N/A” if the number cannot be using the specified format. Write your answers in decimal.

number 9-bit unsigned 9-bit 1’s comple-ment

9-bit 2’s comple-ment

9-bit sign-magnitude

111111100 508 − 7 = 501 −3 − 7 = −10 −4 − 7 = −11 −252 − 7 = −259−000000111

Part(c)Convert the following numbers into binary:

12.5625, 0.140625, 46.375

Assuming you are using a computer with 8-bit words, and you decide to use 4 bits to store the valueson the LEFT of the binary point, and use the remaining 4 bits to store the values on the RIGHT of thebinary point, which of the above numbers can be represented in this new format?

• 12.5625 ⇒ 1100.1001• 0.140625 ∶ Cannot be represented because 0.140625 ⇒ 0.001001• 46.375 ∶ Cannot be represented because 46.375 ⇒ 10110.011

HINT: One easy way to convert these decimal fractional numbers is to multiply the number by 24 = 16.In binary number system, multiplying a number by 2𝑠 is equivalent to shifting the number to LEFT by𝑠 bit. Therefore, the number representation of a number 𝑛 in the above case is simply the same as thebinary reprentation of the number 𝑛 × 24 in binary. Try it on the number 12.5625.

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