fabrication and characterization for inas quantum … · the author report the fabrication process...
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FABRICATION AND
CHARACTERIZATION FOR InAs
QUANTUM DOTS IN GaAs SOLAR CELLS.
REU program, University at New Mexico
Center for High Technology Materials
August, 2011
Student: Thao Nguyen
Mentor: Prof. Luke F. Lester
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The author report the fabrication process for solar cells and electrical response characteristics
of three-stack, six-stack InAs/ GaAs quantum dot solar cells and control GaAs cell contained no
quantum dots. Although the QDs were expected to increase the conversion efficiency, it is found
that the control cell had highest efficiency among the three cells. Some possible causes for the
low efficiency of the QD cell were discussed. Also, newly processed control cell and 6-stack cell
were compared to previously processed control cell and 6-stack cell.
1. Introduction
Energy from the sun is a renewable source and does not have any adverse effect on human
and the environment. Solar energy is one of the most promising solutions to solve the nowaday
energy problem. However, solar panels are not widely used because of the high cost and low
efficiency. This paper is about studying the effect on the conversion efficiency by embedding
Indium arsenide (InAs) quantum dots in gallium arsenide (GaAs) substrate.
Solar cell is a device to convert the sunlight energy to a electric current. A solar cell is a pn
junction with a narrow and more heavily doped n-region. Figure 1 shows a schematic diagram
of a typical solar cell.
Figure 1: The principle of operation of a typical solar cell (exaggerated features to highlight
principles).
In a semiconductor material, all electrons reside in the valence band and they orbit around the
nucleus. When the sunlight strikes on the n-side surface of the solar cell, the photons give the
electrons enough energy so that the electrons can jump to the conduction band. Now the
electrons can freely move. When the electron leaves the atom, a positive hole is also created.
For the light that has medium wavelength, electrons and holes are generated in the depletion
region. The electric field Eo in this depletion region sweeps the positive holes to the p-side of the
cell, and the negative electrons are swept to the n-side. If the cell is shorted, the electrons go
through the external device, reach the p-side and recombine with the holes. For sunlight that has
longer wavelength, the electrons and holes are generated in the neutral –region. They readily
diffuse back to the depletion region where they will be separated as mentioned above. However,
if the electron-hole pairs (EHPs) are photogenerated beyond the minority diffusion length Le, the
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electrons and hole will recombine by the time they reach the depletion region. Similarly, if EHPs
are not photogenerated within the diffusion length Lh because of short-wavelength photons, those
pair will lost be recombination before they reach the depletion region.
Quantum dots (QDs) in GaAs substrate have been excessively used as an intermediate band
in pn junction solar cells to increase the cell efficiency. Theoretically, the efficiency of QD solar
cell can be up to 63% as proposed by Luque and Marti3. In a GaAs single junction solar cell,
only photons that have energy larger than the bandgap energy of GaAs can be absorbed, all light
having longer wavelength passed through the cell. In As QDs have smaller bandgap energy than
that of GaAs, therefore InAs dots can absorb light having longer wavelength. As a result, InAs
QDs embedded in GaAs solar cell are expected to help to increase the cell efficiency.
1.1. Shunt resistance (Rp)
Shunt resistance is caused by manufacturing defects. The defects create alternative path for
the current to flow through instead of flowing through the pn junction. High shunt resistance is
desirable.
1.2. Series resistance (Rs)
Photogenerated electrons have to traverse the n-layer surface region of the solar cell. The
electron’s path introduces series resistance.
Figure 2: Shunt resistance and series resistance from an I-V curve.
1.3. Fill factor
Fill factor (FF) is defined as the ratio of maximum power to the maximum possible current
and voltage. Fill factor depends on the device material and structure. Unity fill factor is desirable.
1.4. Conversion efficiency
The conversion efficiency of a solar is defined as the ration between the maximum output
power to the incident optical power.
(1)
(2)
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Usually, the incident power is 1000W/m2.
1.5. Ideality factor and saturation current
From I-V data measured under dark current condition, ideality factor (n) and saturation
current (Is) can be calculated by equation 3 below:
q : electric charge, 1.602×10
−19 Coulombs
k: Boltzmann constant, 1.380 6488(13)×10−23 m
2.kg/s
2.K
T: temperature in Kelvin
2. Experimental details
There are three different solar cell structures used in our experiments:
- GaAs control cell does not have any quantum dots.
- 3-stack cell has 3 stacks of InAs quantum dots.
- 6-stack cell has 6 stacks of InAs quantum dots.
The control cell and 6-stack cell are grown by Molecular beam epitaxy, while the 3-stack cell
was grown by metal organic chemical vapor deposition (MOCVD).
(a) Control cell (b) 6-stack cell (c) 3-stack cell
Figure 3: Control cell 2126, 6-stack cell 2128, and 3-stack cell 3057.
(3)
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2.1. Cell fabrication
This section presents the processing and fabrication steps for the solar cells.
Figure 4: Schematic representation of the processing steps using inductively coupled plasma
(ICP) etching
(d) p-side metal evaporation
(Ti/Au) on the backside of the
sample
(e) Photolithography using
mask #3 (f) ICP etched mesa
(h) Photolithography
using mask #2
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Before processing, the wafer is soaked in acetone, methanol and isopropyl alcohol (IPA) for
5 minutes each. To remove native oxide, the sample is put in a solution of 1NH4OH: 30H2O for
30 seconds. Then the wafer is baked at 150°C for 10 minutes to remove moisture on the sample
surface.
Both n-side and p-side of the solar cell need to be coated with metals for electrical current
conduction. Metal liftoff method was employed for coating the n-side and metal evaporation
was used for the p-side.
In metal liftoff method, the top surface of the sample is coated with a layer of photoresist
(PR). The desired pattern is created using photolithography method which will be discussed in
more detail in the next paragraph. At this point, some parts of the cell are coated with PR while
other parts are not depending on the mask pattern. Next, subsequent layers of appropriate metals
are deposited on the cell surface for making ohmic-contact metal by metal evaporation method.
After all the metals are deposited, the cell is put in acetone to have the PR dissolved. The metal
on top of the PR will be washed away with the PR. The remaining metal exhibits the desired
pattern. Metal liftoff procedure was illustrated in figure 4(a), 4(b), and 4(c).
The first step in metal liftoff is photolithography. Photolithography is nowadays a common
patterning technique in semiconductor processing. First of all, hexamethyldisilazane (HMDS) is
applied on the sample surface and spun at 4000 rotation per minute for 30 seconds. HMDS is the
adhension promoter for creating a smooth surface preparation for photoresist. The sample is then
baked at 150C for 3 minutes.
A mask is used to imprint the desired pattern on the wafer. For positive PR, UV light changes
the chemical structure of PR and make it soluble in a developer solution, the part covered with
the mask remains insoluble in the developer solution. Negative PR behaves in the opposite
manner in which the part covered with the mask becomes soluble in the developer solution while
the exposed part is insoluble. Therefore, a mask with inverse pattern is needed. Negative PR AZ-
5214_IR was used in our experiments. PR is applied onto the sample surface and spun at 4000
rpm for 30 seconds. The sample was then soft bake at 90°C for 2 minutes to remove excess PR.
Figure 5 is the photograph of mask #1 used in this step for the cell pattern. This mask has
three different sizes of square cells with dimensions 5x5mm, 3x3mm, and 2x2mm.
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Figure 5: Mask #1 for the cell patterns
The sample is exposed under UV light having the wavelength of 405nm for 2 seconds. Then
it is baked at 112°C for 60 seconds. To activate the photochemistry, the whole sample is flood
exposed to the UV light without the mask for 30 seconds.
The developer solution is AZ400K: DI water with the ratio 1:4, respectively. The sample is
dipped in the solution for about 20 seconds in order to remove the PR part exposed to the UV
light. Figure 4(a) shows an illustration of the sample after photolithography.
Before doing metal evaporation, unwanted photoresist scum was removed by oxygen plasma
descum using a reactive-ion etcher (RIE). Native oxide was also removed by dipping the sample
in 1NH4OH: 30H20. Now it was ready for metal evaporation for coating the n-side.
In metal evaporation method, thermal emission of electrons from a Tungsten filament source
is used to heat the metal to a very high temperature so that the metal is evaporated. The magnetic
field inside the chamber steers the electron beam about 270° into the metal. The evaporated
metal particles fly up and attach to the mounted sample.
Subsequent layers of germanium, gold, nickel, and gold are deposited on the n-side of the
cell with thickness of 260Å, 540Å, 200Å and 2000Å, respectively. The sample is then soaked in
acetone for at least an hour in order to dissolve the PR as well as to remove the metal on top of
the PR. Now the probing pads, buses and fingers are metallic .This metallization process covers
about 20% of the solar cell surface area and creates a shadowing effect on the surface2 .
Metal evaporation is also used to prepare the p-side ohmic contact. This p-type contact layer
consists of titanium and gold with thickness of 500Å and 3000Å.
In the next step rapid thermal annealing (RTA), the sample is quickly heated up 380°C for
60s and slowly cooled down to avoid breaking the sample due to thermal shock. This step is to
ensure a good ohmic contact with the sample.
To isolate the devices on the same sample, mesa structure etching is performed using boron
trichloride (BCl3) gas in an inductively couple plasma (ICP) chamber.
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Before placing the sample in ICP chamber for etching, photolithography is carried out using
mask #3 in figure 6. Everything on the cell surface is covered with PR except the boundaries
between the devices.
BCl3 gas in ICP chamber etches GaAs substrate from the n-side surface through the intrinsic
to the p-layer as illustrated in figure 4(f) . A negligible amount of the PR is removed as well
during the procedure due to slower removal rate of PR compare to the removal rate of GaAs. The
part of the sample covered with the PR is protected during ICP etching.
Figure 6: Mask #3 used for indentify the mesa solar cell structure
To minimize the light reflection, an antireflection coating (ARC) of silicon nitride (Si3N4) is
deposited on the n-side surface using a plasma enhanced chemical vapor deposition (PECVD)
machine. SiH4-Ar, NH3 and N2 with the flow rate of 30 sccm, 50 sccm, 15 sccm are fed into the
chamber for about 7 minutes. The final thickness of Si3N4 is approximately 1000Å.
Si3N4 on the probing pads must be removed for I-V characterization. Photolithography with
mask #2 is again performed. PR on the probing pads and the cell boundaries is removed. Si3N4
at these positions can then be etched out using tetrafluoromethane (CF4) in the presence of
oxygen in a reactive-ion etcher (RIE).
Once the etching is complete, photoresist scum is removed by oxygen in the RIE. Excess PR
is washed away with acetone after that.
Now the cell is ready for characterizations.
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2.2. I-V measurement
Below is the schematic representation for the setup used to measure the current-voltage of the
solar cells.
Figure 7: A schematic diagram of the setup for I-V characterization of solar cells.
A ABET Technology light source with a 150W-Xenon light simulates the sunlight. A
filter is inserted between the light source and the sample to emulate the AM1.5 solar spectrum on
the earth surface. Calibration is carefully done at the beginning to find the optimal distance
between the source and the sample so that light with intensity 100mW/cm2 (one sun) hitting the
cell. Four-point probe measurement rather than two-point probe measurement is used to be able
to obtain more accurate data. Temperature can greatly affect the I-V data, so a temperature
control device is used to keep the temperature of the measuring cell always at 25°C. A HP
4155B parameter analyzer collects the I–V data. This is done by sweeping voltage from -1V to
2V with the step size of 10mV and measuring the corresponding current.
From the I-V data, we can obtain open circuit voltage, calculate short current circuit
density, normalized maximum power, fill factor, conversion efficiency, shunt resistance and
series resistance. Ideality factor and normalized saturation current can be calculated from the I-
V data measured under the dark condition.5
3. Results and discussion
I-V measurements were conducted for the following cells:
- The previously processed control cell 2126.
- The previously processed 6-stack quantum dot cell 2128.
- The newly processed control cell 2126.
- The newly processed 6-stack cell 2128.
- The previously processed 3-stack cell 3057.
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For comparison, we processed the new cells using the same wafers (2126 or 2128) as in
previously processed cells. Even though the wafers were carefully produced in the same
conditions, different wafers might have different manufacturing defect which affects the shunt
resistance, ideality factor and saturation current.
6 stack 3 stack control
Short circuit current density (mA/cm^2) 8.000 4.000 6.000
Open circuit voltage (V) 0.550 0.425 0.870
Normalized Maximum Power (mW/cm^2) 2.947 1.083 4.000
FF (%) 66.8 63.4 79.8
Efficiency (%) 3.54 1.30 4.80
Shunt resistance (Ω) 11,111 5,000 166,667
Series resistance (Ω) 38.17 59.52 37.59
Ideality factor 1.839 1.615 1.758
Normalized saturation current (nA/cm^2) 63.658 234.31 0.016
Table 1: I-V characterization for the 5x5mm 6-stack cell 2128, control cell 2126 and 3 stack
cell 3507. All devices are newly-processed. Illumination conditions are AM1.5.
The 6-stack cell attains the highest short circuit current among the three cells dues to the
embedded InAs quantum dots which can absorb photons at longer wavelengths. The short circuit
current of the 3-stack QDs cell was lower than the 6-stack QD version which may be attributed
to fewer QD layers so that less photons were absorbed. The lower shunt resistance indicated that
3-stack cell has worse material quality, more electrons were lost by flowing through alternative
paths that are not the diode. Also, the 3-stack cell probably had a thinner intrinsic region which is
not desirable. Another possible reason is that the high series resistance limited the short circuit
current.
Open circuit voltage, Voc, of the control cell is higher than that of the 6-stack cell and 3-stack
cell. Primarily, this occurs because of the lower energy bandgap of the InAs QDs. Another
possible reason is that the QD stacks introduced defects into the GaAs layers, which decreased
the shunt resistance Rp and, therefore, decreased Voc. The higher open circuit voltage of the
control cell can by interpreted by three factors. First, the shunt resistance was high. Second, the
minority diffusion length in this homojunction structure may be longer. Third, the average
bandgap of the semiconductor materials is higher.
High series resistance also lowers the maximum power which in turn results in low
efficiency. As can be seen from table 1, the control cell had the lowest series resistance of
37.59Ω and achieved the highest normalized maximum power of 4mW/cm2 and the highest
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efficiency of 4.8%, while the 3-stack cell had the highest series resistance of 59.52Ω, lowest
normalized maximum power of 1.08mW/cm2 and the lowest efficiency of 1.08%.
As mentioned above, the shunt resistance of the control cell was highest because the
leakage current is less than in the quantum dot cells. Normalized reverse saturation current, Js, is
a measure of the leakage carriers in a pn junction. The control cell obtained the smallest Js of
0.016 nA/cm2, the 3-stack cell had much higher Js, 234.31nA/cm
2, indicated poorer material
quality. This result agreed with the lower open circuit voltage compares to the control cell and 6-
stack cell.
5x5 3x3 2x2
old new old new old new
Short circuit current density (mA/cm2) 8.800 8.000 8.333 7.156 8.275 7.425
Open circuit voltage (V) 0.540 0.550 0.540 0.540 0.540 0.540
Normalized Maximum Power
(mW/cm2) 3.230 2.947 3.080 2.671 3.075 2.795
FF (%) 69.1 66.8 68.4 69.1 68.8 69.7
Efficiency (%) 3.876 3.536 3.696 3.205 3.689 3.354
Shunt resistance (Ω) 9090 11111 25000 33333 50000 50000
Series resistance (Ω) 17.86 32.57 38.46 53.76 55.25 85.47
Ideality factor 1.900 1.839 1.801 1.772 1.883 1.847
Normalized saturation current
(nA/cm2) 112.479 63.658 70.378 47.860 116.354 76.290
Table 2: I-V measurements for the previously processed 6-stack cell 2128 (old) versus the newly
processed 6-stack cell 2128 (new).
The table above shows calculations for the previously processed 6-stack cell 2128 (old)
and newly processed 6-stack cell 2128 (new). There are two important things different between
the old cell and new cell that need to be pointed out before discussing the results.
On page 8 part 2.1-cell fabrication, we said that mask #3 should be used in etching the
mesa structure step. However, mask #2 was used instead by mistake. The probing pad was not
covered with the PR as supposed. As a result, some ohmic-contact metal was removed during the
ICP etching. The thickness measurement for the probing pads and contact buses were conducted
to confirm this observation. The height difference between the pad and the bus was expected to
be only 1000Å which was the thickness of the AR coating; however, thickness measurement
showed that the height difference was about 3400Å or 4500Å depending on the different location
on the wafer. This proved that the some of the ohmic-contact metal was lost.
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The second thing to notice is that the AR coating thicknesses of the two samples were not
the same. The AR coating of the new cell was thicker than the old cell because the new sample
was run in the PECVD machine for 9 minutes instead 7 minutes for the old cell. It can be easily
seen that the AR coating of the new sample had pale blue while the old sample had darker blue
AR coating.
(a) Old 6-stack cell (b) New 6-stack cell
Figure 7: ARC on the old 6-stack cell and the new 6-stack cell.
Now we can proceed to the discussion for the result.
Open circuit voltage data of the two cells were similar as expected.
Short circuit current density for old cell was higher than the old cell. This can be explained
by the difference in AR thickness for the two samples. A dark blue AR coating is desirable
because it reflects mostly light that has wavelength shorter than the wavelength of blue light, and
absorbs light having longer wavelength. The AR coating in the new sample had pale blue color
that more light that has longer wavelengths were reflected back, so a smaller portion of the
sunlight spectrum was absorbed. As a result, less photons were absorbed in the new sample
leading to fewer electrons and holes generated. Therefore, the short circuit current for the new
cell was lower than the old cell.
Also, a higher series resistance for the new sample devices contributed to the low short
circuit current, but only a tiny bit.
Smaller normalized maximum power and lower efficiency for the new samples resulted
from the higher series resistance. Series resistance consists of contact resistance Rcontact and
material resistance Rsurface. 5x5mm cell on the new sample was compared to 5x5mm cell on the
old sample, the area was the same so Rsurface should be similar. However, Rcontact for new cell
was higher due to the loss of ohmic-contact metals. Therefore, series resistance for the new cell
was higher than the old cell.
The higher shunt resistance for all the devices on the new sample was probably because the
section of the substrate that was used to make new cells accidently had less defects and therefore
exhibited better quality. Or it is also possible that the shunt path along the perimeter of the new
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solar cells was more resistive. This result agreed with the normalized saturation current result.
The new sample had higher shunt resistance resulted in the less current leakage which translated
to lower normalized saturation current.
4. Conclusion and future work
InAs QDs as intermediate band for GaAs solar was presented. Control cell and 6-stack cells
were fabricated. I-V characterization was performed. These new cells were compared to the
previously processed 3-stack cell. The new 6-stack cell was also compared to the old 6-stack
cell.
The new 6-stack cell had smaller efficiency than the old 6-stack cell. This is because of the
antireflection coating and the wrong mask used in mesa structure etching step.
Among the control cell, the 6-stack cell and the 3-stack cell, the control cell achieved highest
conversion efficiency. Although QDs were expected to improve the efficiency by absorbing light
that has longer wavelength, the QDs introduced some problems that caused the efficiency of the
QDs cells lower than the control cell in fact. Stacking many layers of quantum dots build up
compressive strain and leads to defect formation. These defects act as carrier trap and reduce the
cell efficiency. We are working on using GaP strain compensation layer to relieve the strain.
Another issue with the quantum dots is that the electrons and holes fall into the dots or the EHPs
photogenerated inside the dots become useless. Those electrons and holes do not contribute to
the electric current. Extracting those carriers out of the quantum dots in order to increase the cell
efficiency is an ongoing research at CHTM.
References
[1] S.O.Kasap, “Optoelectronics and photonics principles and practices,” Prentice Hall Inc, first
edition.
[2] Mohamed Abdel Rahman El-Emawy, “Development of Indium arsenide quantum dot solar
cells for high conversion efficiency”, UNM, (2008).
[3] R.B Laghumavarapu, M. El-Emawy, N. Nuntawong, A. Moscho, L.F. Lester, and D.L.
Huffaker, “Improved device performance of InAs/GaAs quantum dot solar cells with GaP
strain compensation layers”, Applied Physics Letters 91, 243115 (2007).
[4] R.B Laghumavarapu, M. El-Emawy, N. Nuntawong, A. Moscho, L.F. Lester, and D.L.
Huffaker , “GaSb/GaAs type II quantum dot solar cells for enhanced infrared spectral
response”, Applied physics letter 90, 173125 (2007).