fir low pass filter

8/9/2019 FIR low pass Filter

http://slidepdf.com/reader/full/fir-low-pass-filter 1/9

NMAM INSTITUTE OF TECHNOLOGY,NITTE

(An Autonomous Institute under VTU, Belgaum)

NITTE - 574110

DepartmentOf

Electrical and Electronics

Embedded Systems

Task Report - 2

Implementation of FIR low pass filterIn STM32f4 Discovery Board

By

1. Kiran B V (4NM11EE019)

2. Prajwal B V (4NM11EE035)

3. Vidya M C (4NM11EE065)



Overview: This document is a brief report on our second task for embedded

systems. The Overview summarizes the content of this document. Our second task

was to implement a FIR low pass filter in STM32F4 Discovery Board. For more

information about the task please refer to the task details.

The STM32f4 Discovery board comes with an internal 12 bit ADC which is used to

sample the analog signal. The samples are then processed using the FIR algorithm

and the result is converted back to the analog form with the internal DAC. The

sampling frequency ‘fs’ determines the processing bandwidth. The microcontroller

has to convolute 2*M+1 samples every “1/fs” seconds.

As suggested by its name, A FIR or finite impulse response filter is characterized by

the finite length of its impulse response. The impulse response of an ideal low pass

filter is of infinite length and it takes the form ofsin(Ω∗n)

π∗n function. Limiting its length

provides a good approximation to the ideal filter although it leads to several

disadvantages. Usually there’s a trade-off between the transition band and the stop

band attenuation. Limiting the length of impulse response can also be viewed as

multiplying the ideal impulse response with windows. A window is a finite length

discrete signal which is zero outside that length. Among the various windows that are

commonly used, rectangular is the simplest and perhaps the only one which gives

the sharpest cut-off characteristics. The FIR filter we designed uses a rectangular

window.

The majority of our work was carried out in developing the real time FIR filter

algorithm. The principle of FIR filter algorithm was initially tested in MATLAB. It was

then rewritten with some modifications so that the code had direct resemblance to its

C counterpart. Finally the code was developed in C. To test the code we used asample sinusoidal signal that was stored in microcontroller memory. After few

corrections the output of C code matched the MATLAB output.

The FIR filter was also tested with a Digital oscilloscope. Its input was given from an

AFO and the output was connected to the oscilloscope. The waveforms for different

input frequencies were recorded. Inputs with frequency greater than 200 Hz were

attenuated while those with lesser frequencies appeared at output with no

attenuation.



Task Details: Use cortex m4 stm32 board to demonstrate low pass fir filter with a cut-

off frequency of 200 Hz.

Principle: As explained in the overview the working of FIR filter relies on convolution

of sampled data with a finite length impulse response of a low pass filter. The

impulse response of a low pass filter has the formsin(Ω∗(n−M))

π∗(n−M) where “Ω”

represents the digital cut-off frequency. "Ω” is proportional to the analog cut-off

frequency and the exact relationship between them can be written as Ω

2∗ ∗

where is the sampling frequency.

The convolution of the two signals produces the output. It can be calculated from the

equation shown below.

y[p] ∑ [] ∗ ℎ[ ]

=−2∗

From the equation we can make the following statements

1. Input sampled signal is not defined for p<0 since the first sampled input is

taken as x[0] 2. To compute the output y[p] a set of 2*M+1 input samples are required. i.e,

x[p-2*M], x[p-2*M+1], x[p-2*M+2], x[p-2*M+3], ….. x[p] are required to

compute the output y[p].

Working: The FIR filter has to process 2*M+1 samples once every “1/fs” seconds.

This is due to the fact that the ADC will add a new sample every “1/fs” seconds and

the computation of the corresponding output requires the last 2*M+1 input samples.

The timing of various operations is synchronized by the internal timer. The timer

overflows every ‘1/fs’ seconds which causes an ISR to be executed. The ISR will set

the “continue_flag” to 1. Once the flag is set the main loop will go for the next

execution cycle where the ADC collects a new sample which is processed and

updated to the DAC by the microcontroller.



Development of FIR algorithm: The principle was initially tested in matlab. A set of

100 samples of input was convoluted with the impulse response of a FIR low pass

filter. Here the input was a sinusoidal signal of two different frequencies. One was in

pass band while the other in the stop band. The convoluted output for two

frequencies are provided below. In both plots the first and last 100 samples should

be discarded since the computation of these samples relied on x[n] being 0 which is

not true.

Figure 1. Input in stop band Figure 2. Input in pass band

This code was modified so that it operated on a real time input rather than on a

stored input signal. Here the input to the FIR filter was provided one by one in a

sequential manner. The output was also updated in the sequential manner. The

picture shows the output of FIR filter for two inputs where one is in pass band and

another in stop band.

Figure 1. Input in stop band Figure 2. Input in pass band

Finally the code was developed in keil IDE. We tested the code in the keil debugger

by verifying the output array “y_virt” for inputs of various frequencies. As in the



previous cases, the two inputs was chosen so that one of them was in the pass band

and another in the stop band.

Aliasing: The next set of pictures show the output for input frequencies above the

sampling frequency (4 KHz). Since the anti-aliasing filter is not used, all higher

frequencies appear as lower frequency signals at output. These pictures were taken

to verify the repeating nature of the filter response characteristics.



Testing results: The FIR low pass filter was tested by verifying its output for input of

various frequencies. Input to the filter was given from AFO which was a 2.5Vp-p

sinusoidal signal with a suitable DC offset. The DC offset is required since the input

range of ADC is limited to 0 to 3V. The output was recorded on a digital oscilloscope.

Channel 1 of the oscilloscope is connected to the AFO output and channel 2 is

connected to the output of the FIR filter. In the pictures shown below the bottom

trace represents the signal in channel 1 while the upper trace represents the signal

in channel 2.

The first picture shows the output of FIR filter for a 30 Hz sinusoidal signal. Since the

cut-off frequency is at 200Hz the output is not attenuated



This picture shows the output when the frequency of the input sinusoidal signal is

closer to the cut-off frequency.

Output is attenuated for input frequencies above the cut-off frequency.



Further increasing the input frequency will reduce the output amplitude to almost

zero.

fir low pass filter

Documents