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Nelson Wong
10th Sep 2013
Global Assembly & Packaging Market Overview
2Confidential
Israel, YoknaemBonding Tools R&D
Manual Wire Bonder Manufacturing
China, SuzhouBonding Tools Manufacturing
Blades R&D and ManufacturingSoftware R&D
Singapore (Corporate HQ)Ball & Wedge Bonder
R&D and ManufacturingAdvanced Packaging Bonder R&D
USA, Irvine (CA)Wedge Bonder R&D
USA, Fort Washington (PA)Equipment R&D
Advanced Packaging R&D
Switzerland, BergAdvanced Packaging Software R&D
K&S Manufacturing Plant
K&S R&D Center
Global Presence
K&S Sales/Service Office
3Confidential
ConnXIConnProCu
ConnX-LED
ConnX-VLED
Market Driven Products - Equipment
SoftwareManual Wire Bonders
iBond50004700452245244526
Ball Bonders IConn
3700Plus 3600Plus
Wafer LevelBonders
ConnXPlus
PowerFusion
Service
ATPremierPlus
4Confidential
Market Driven Products - Consumables
Wedge Tools Wedge Tools Ribbon Tools
Capillaries
E-
Capillary for Gold Wire Bonding
Capillary for CopperWire Bonding
Dicing Blades
Blades for Wafer Dicing
Blades for Package Singulation
Semiconductor Assembly Overview – Wire Bond Perspective
6Confidential
IC Package Assembly Market
Source : Prismark
IC Shipment had been growing steadily and continue to grow Growth driver – mobile and communication devices
7Confidential
Assembly Packaging Trend
IC growth is driven by mobile devices – hand-phone, media tablet, and notebook computers
There are more mobile phones than people on earth Demand for mobility and usability drives packaging
miniaturization – reduce weight and power consumption Mobile gadget gets smaller and increase functionality –
demand for more IC per unit, either integrated or/and smaller About 80% of IC packages are wire bonded – the balance
uses flip chip and other interconnect technologies Packaging cost drives the conversion of gold bonding wire to
copper - ~35% of packages are copper wire bonded
8Confidential
Semiconductor Fabrication Supply Chain - 2012
Semiconductor Industry$292B
Wafer Fabrication$123B
Design, G&A & Profit$91B
Test$34B
Assembly$44B
Assembly Process$26B
Assembly material$18B
Source : Prismark
Assembly Equipment
$4.2B
OSAT share of total assembly & test market : ~41%
9Confidential
IC Packaging Value
Source : Prismark
10Confidential
Packaging Demand
Demand for performance and mobility resulted Increased functionality per chip – higher I/O Squeeze higher I/O on a smaller chip – finer pitch Stacked die Smaller package size – lower package height – lower loop
Lower cost High density matrix packaging – larger LF configuration Copper wire More productive equipment
11Confidential
Ultra Fine Pitch Applications
70um pitch 25mm wire60um pitch 25mm wire
50um pitch 23mm wire
35um pitch 15mm wire40um pitch 18mm wire
45um pitch 20mm wire
28um
56um
Chip complexity and functionality integration increases I/O count per chip Chip size reduction means a finer pitch pad is necessary to pack all the I/O in
12Confidential
QDP
Looping Requirement
MCP(2 Chip)MCP-I(4 Chip)
DDP
SIP>8mil
Loop Height
<3mil >4mil
<2mil
Ultra Low LoopAdvanced Loop
Standard Package Small Size & High Density Multi-stacked & PoP Higher Stack >10 die
stacked
13Confidential
Ultra Low Loop
As mobile gadget gets smaller, packaging gets smaller and thinner Thinner packages and more complicated chip demand advances in packaging
technology – finer pitch, lower loop height, multi-layer wire, complicated layout
14Confidential
A Slow Start To High Volume Copper Ball Bonding – now at Full Speed
Early Development & Low Volume Production
Performance in High Power Devices (TO & SO)
Low Pin Count ICs (SOIC & PDIP)
High Pin Count ICs (BGA & QFP)
Increasing maturity of copper ball bonding process & cost advantage
early 1990s
1990s to early 2000s
Mid 2000s
High volume production started in late 2009
Late 2000s
15Confidential
Equipment, Tools, & Wire Knowledge
Process Knowledge
Process Stability
Gold to Copper Transition
High Volume Production
New Production Methods
Reliability Knowledge
Copper Wire TransitionC
oppe
r Bon
der I
nsta
lled
(K&
S)
16Confidential
Package CostCOMPARISON OF 500 CSP PACKAGING COST
(Assumes High Volume)
Gold Wire CSP0
10
20
30
40
50
60
70
80
90
100US Cents
Copper Wire CSP Flip Chip CSP 2-Layer
Wire28¢
86¢
70¢
Wire 7¢
Kc61
3.14
1bp-
com
paris
on50
0
Wire bonding
20¢
Wire bonding
24¢
Other Package Costs 8¢
Other PackageCosts 8¢
2-LayerSubstrate
30¢
2-LayerSubstrate
30¢
80¢
Bumping 15¢
Underfill10¢
OtherPackage
Costs 20¢
2-LayerSubstrate
35¢
Source : Prismark
17Confidential
K&S Wire Bonder Evolution
Finer pitch and higher productivity are values that helps improve packaging cost Pitch had reach its limit and productivity growth is expected to continue
18Confidential
Accelerates Copper Transition
K&S introduced IConn ProCuPS , an advanced copper wire bonder Faster throughput with specialized
copper processes, ProCu Bond and ProCu SSB
New process tools and features that make the complex capabilities easy to use
Robust solution enable customer to accelerate transitioning to copper wire bonding production R&D has shifted towards developing
solution that enable ease-of-use and capability to bond the latest technology node
19Confidential
IC Packaging Moving Forward
Wire bonded packages continue to dominate in the near future Most versatile and cost effective solution Copper wire had reduces packing cost significantly and had demonstrated
capability to bond on 28nm node chip – R&D on next node Conversion to copper is a necessity to be competitive, silver alloy wire is a
possible alternative Flip-chip will grow at a faster rate in the high performance chip segment –
CPU, GPU, AP,… IC performance requirement will drives FC growth despite the higher cost
Cost and package size will determine the mode of interconnect Material cost, efficient process, productivity are some of the cost driver R&D in wire bonding will continue to challenge the technological boundary to
stay relevant OSAT growth with exceed IC shipment growth – as fabless companies grow
and IDM outsource mode
20Confidential
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