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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 53, NO. 9, SEPTEMBER 2005 2899

X-Band Two-Stage High-EfficiencySwitched-Mode Power Amplifiers

Srdjan Pajic, Student Member, IEEE, Narisi Wang, Student Member, IEEE, Paul M. Watson, Member, IEEE,Tony K. Quach, Member, IEEE, and Zoya Popovic, Fellow, IEEE

Abstract—This paper presents efficiency optimization of-band two-stage microwave power amplifiers (PAs) in which

the output stage is designed to operate in class-E mode. A hybridPA which uses the same MESFET devices in both stages achieves16 dB of saturated gain with an output power of 20 dBm and totalpower added efficiency (PAE) of 52% at 10 GHz. A broadbandmonolithic two-stage double heterojunction bipolar transistorPA, fabricated by Northrop Grumman Space Technology, with aclass-AB first stage and class-E second stage achieves 24.6 dBm ofoutput power with 24.6-dB gain and total PAE of 52% at 8 GHz.The design is performed starting from class-E theory and usingload–pull measurements and/or nonlinear simulations.

Index Terms—Class E, load–pull, power amplifiers, two stage.

I. INTRODUCTION

SWITCHED-MODE power amplifiers (PAs) exhibit inher-ently low gain compared to other classes of operation, due

to deep compression required for active device switching [1],[2]. In order to improve the power gain, high-efficiency stagescan be cascaded. The goal of this paper is to examine tradeoffs inhigh-efficiency PA design when the efficiencies, gains, biases,and output powers of both stages are design parameters. Theanalysis, design, and characterization of two dual-stage class-EPAs is presented as follows.

• Section II discusses effects of driver-stage efficiency onoverall two-stage PA performance. By defining the reduc-tion of PAE due to the addition of the driver stage, it isfound that the overall PAE can be equal or even greaterthan the second stage PA, provided that a high-efficiencydriver stage is used.

• A hybrid two-stage class-E PA based on identical GaAsMESFET driver and power stage active devices is pre-sented in Section III. Bias control is used to ensure class-Eoperation for different output powers using the same ac-tive device.

• Section IV discusses a monolithic two-stage class-EPA implemented in InP DHBT technology, fabricatedby Northrop Grumman Space Technology (NGST). In

Manuscript received November 2, 2004; revised March 21, 2005. This workwas supported by Wright-Patterson Air Force Base, by Wyle Laboratories underGrant PO 19035.0D.31-369S, and by the Defense Advanced Research ProjectsAgency Intelligent RF Front Ends Program under Grant N00014-02-1-0501.

S. Pajic, N. Wang, and Z. Popovic are with the Department of Electrical andComputer Engineering, University of Colorado at Boulder, Boulder, CO 80309-0425 USA (e-mail: [email protected]).

P. M. Watson and T. K. Quach are with the Sensors Directorate, Air ForceResearch Laboratory, Wright-Patterson Air Force Base, WPAFB, OH 45433USA. (e-mail: [email protected]).

Digital Object Identifier 10.1109/TMTT.2005.854239

Fig. 1. Directly coupled two-stage switched-mode PA. Interstage andoutput matching networks provide fundamental and harmonic frequencyterminations for the first and second stage, respectively. Biasing is providedusing high-impedance bias lines and series dc blocking capacitors C .

this amplifier a smaller periphery device is used for theclass-AB driver stage.

• Section V summarizes the properties of the PAs from Sec-tions III and IV. The hybrid amplifier using the same de-vice in both stages demonstrates comparable efficiency tothe monolithic PA.

II. TWO-STAGE PERFORMANCE ANALYSIS

Adding multiple amplifier stages to increase gain results indecreased efficiency. To quantify the tradeoff between gain andefficiency in a two-stage amplifier, drain efficiency (Fig. 1)can be expressed in terms of the drain efficiencies and gains ofthe individual stages , and

(1)

The assumption used to derive (1) is that the two stages areperfectly isolated, so that their individual characteristics aremaintained. Assuming that the second stage already operates ina high-efficiency mode (class E, for example), it is interestingto examine the overall drain efficiency as a function of the modeof operation of the driver stage. Fig. 2 shows the two-stagedependence on the input stage drain efficiency. The parameterin the plots is the second-stage gain . For an -band class-EPA in the second stage, e.g., [3], with a saturated power gainof 8 dB and %, an increase of driver-stage efficiencyfrom 20% (Class A) to 70% (class E) results in the following:

• increase in overall from 45% to 61%;• 25% decrease in dc power consumption;• 35% increase in battery lifetime (assuming constant bat-

tery characteristics over time);• 48% reduction in power dissipated to heat in the active

device;

0018-9480/$20.00 © 2005 IEEE

2900 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 53, NO. 9, SEPTEMBER 2005

Fig. 2. Two-stage drain efficiency versus input stage drain efficiency. Thesecond-stage drain efficiency is fixed to 70% (solid lines) and 60% (dashedlines). The parameter is the second-stage gain G . The vertical lines indicateapproximate limits for PA efficiency in different classes of operation atmicrowave frequency.

• decrease in overall gain by the amount of gain compres-sion of the first stage.

However, as the second-stage gain reaches higher values(above 12 dB), changing the mode of operation of the firststage from low efficiency (e.g., class A) to high efficiency (e.g.,switched mode) results in a minor efficiency improvement(less than 8%). Since this is always followed by considerabledecrease in the first-stage gain due to compression, one maydecide not to sacrify a few decibels of gain for a few-percentefficiency improvement. Switched-mode PAs are highly non-linear as compared to A/AB classes. A comprehensive study ofclass-E linearity is given in [4].

Two-stage drain efficiency is independent of first-stage gain.On the other hand, the two-stage PAE is a function of drainefficiency and gain of both stages

(2)

Since the increase in the first-stage drain efficiency affects thegain of the first stage, it is more convenient to analyze PAE bydefining

% % (3)

as the reduction of PAE due to the addition of a driver stage.Combining (2) and (3), a relationship between required driver-stage PAE and the reduction of the output-stage PAE can beexpressed as [5]

(4)

where , and are the efficiency andgain values of the driver and output stages, respec-tively. Fig. 3 is a graphical representation of (4) for

Fig. 3. PAE versus�PAE forG equal to 8, 11, 14, and 17 dB.PAE is 55%in both cases andG is either 7 dB (upper curve set) or 11 dB (lower curve set).The horizontal lines indicate approximate limits for microwave PA efficiency ofdifferent classes of operation.

two cases: a higher gain high-efficiency second stage( % dB), and a lower gain high-ef-ficiency second stage ( % dB). Theparameter is the gain of the first stage ( , and

dB), with typical gain values for different classes of op-eration of microwave active devices, from deeply saturatedclass E to linear class A, respectively. To maintain the PAEof the two-stage amplifier very close to the second-stage PAE(e.g., %) the PAE of the first stage has to be above36%. This can be easily achieved if the first stage operates inAB class, resulting in minimal gain reduction. However, if thesecond stage has smaller gain, but high efficiency, in order tomaintain PAE reduction at the same value (less than 2%) theefficiency of the first stage has to be around 50%. This can beachieved operating the first stage PA in deeper AB or B classof operation.

The PAE plot in Fig. 3 reveals another property of two-stageamplifiers: the overall PAE can actually be equal or even greaterthan the second stage PAE. For example, for a low-gain high-efficiency second stage ( dB, %

%), if the PAE of the first stage is the same as the secondstage PAE, the overall PAE will remain the same.

In this paper, two PAs that optimize are presented.

• The first is a hybrid PA with identical GaAs MESFETactive devices in both stages. A highly efficient secondstage is designed to operate in switched mode (class E).The driver stage is designed using the same device in classE but at a lower bias.

• The second is a monolithic PA with InP DHBT activedevices with different peripheries for driver and outputstages. The second stage operates in an alternative classE, achieving large bandwidth [6], while the first stage isdesigned to operate in AB class, maximizing the gain withminimal decrease in overall PAE.

Common practice for cascading amplifier stages includes thefollowing:

PAJIC et al.: -BAND TWO-STAGE HIGH-EFFICIENCY SWITCHED-MODE PAs 2901

Fig. 4. Measured 10-GHz source (left) and load–pull (right) contours of constant P (solid) and gain or � (dashed). The active device is terminated with an“open” at 20 GHz. The experimentally determined optimal bias point is V = �1:55 V and V = 4:2 V. The maximal P and the maximal � are markedby “x” and “+,” respectively. Selected optimal source and load impedances (circles) are Z = (7:7 + j12) and Z = (27:2 + j25:8) . The calculatedoptimal impedance for class-E mode Z at 10 GHz is shown.

• cascading two balanced amplifiers, which provides iso-lation between separately designed stages due to thematching provided by directional couplers;

• inserting a nonreciprocal element (isolator) betweenstages;

• direct connection of the driver and output stages with aninterstage matching network.

The latter approach is followed in this paper, as it eliminates theloss due to couplers/isolator, reduces the required real estate,and allows a monolithically integrated circuit.

III. HYBRID TWO-STAGE HIGH-EFFICIENCY PA DESIGN

It is clear from the analysis in Figs. 2 and 3 that the efficiencyof the second stage should be maximized. Class-E operation ischosen in this work since it requires slower devices than otherswitched modes and it is relatively insensitive to parameter vari-ations [7], [8].

A. Class-E Output Stage

Class-E theory applied to microwave amplifier design is pre-sented in [1] and [9], assuming the active device is behavingas an ideal switch. For the microwave class-E amplifier design,a general-purpose GaAs MESFET (AFM04P2) manufacturedby Skyworks Solutions, Inc., Woburn, MA, is chosen. It has agate length of 0.25 m, with total gate periphery of 400 m andan of 30 GHz. According to the device specifications, theMESFET is able to deliver around 21 dBm of output power at18 GHz, with a gain of 9 dB, while operating in class-A mode.Using given -parameters of the active device, a small-signalmodel is derived and the output capacitance is estimated to be

pF. From the design formula given in [1]

(5)

and known output capacitance, the optimal class-E impedance iscalculated at 10 GHz: . This assumes ideal

Fig. 5. (a) Output stage class-E PA. (b) Hybrid two-stage class-E PA afterinterstage matching network tuning. Both PAs are fabricated on Rogers TMM6substrate (� = 6; h = 0:635 mm, t = 35 �m).

(“open”) termination of the active device output at all higherharmonics. The operation of a realistic active device deviatesfrom the ideal case, mainly due to the finite switching time, fi-nite ON and OFF resistances, and presence of numerous para-sitics in the active device output (transistor pad inductances andcapacitances, mounting area parasitics, bond wire inductances,etc.). The available (TOM2) nonlinear model for the MESFETdoes not adequately model switched mode of operation, there-fore, a harmonically terminated load–pull characterization wasperformed in the neighborhood of the theoretically determinedload impedance. For the selected device, it is empirically deter-mined [9] that it is sufficient to terminate the second harmonicfrequency for approximate class-E operation.

In the load– and source–pull measurements the referenceplane is set to include packaging parasitics due to bonding andmounting. The resulting load and source-pull contours at 10GHz are shown in Fig. 4. Based on impedances in Fig. 4, aclass-E output stage PA, Fig. 5(a), was designed on RogersTMM6 substrate ( mm, m). Noadditional post-production tuning was necessary. Measuredpower sweep characteristics of the connectorized PA are shownin Fig. 6. The input return loss for an input power of 13 dBm ismeasured to be 16 dB.


Fig. 6. Measured power sweep characteristics of the output stage class-E PAat 10 GHz for a bias point V = �1:55 V and V = 4:2 V.

Fig. 7. Equivalent class-E output circuit, assuming the transistor is an idealswitch with a shunt output capacitance. The ideal RF choke provides a constantbias current I and bias voltage V for the transistor. The output matchingnetwork transforms the load resistance R into the optimal impedance Z

required for class-E mode of operation. It also provides ideal harmonicterminations resulting in purely sinusoidal load current.

B. High-Efficiency Driver Stage

Fig. 2 shows the efficiency tradeoffs in drive-stage operatingmode choice. For this hybrid two-stage PA, a class-E driverstage is chosen, using the same GaAs MESFET as the outputstage. However, a decrease in input power will cause a signifi-cant drop in the amplifier efficiency. This is a common problemfor all high-efficiency classes of operation. Nevertheless, it canbe shown that the bias point can be adjusted to maintain class-Eoperation at lower output power levels. Consider the output cir-cuit of a typical ideal class-E amplifier, shown in Fig. 7. Fromthe derivation presented in [1] the open-switch voltage is foundas the time integral of the current through the output capacitor,under the assumption of soft turn-on and 50% current/voltageduty cycles

(6)

where is the average drain cur-rent, and is the angular switching frequency. If the dc supplyvoltage is provided through an ideal RF choke, the average value

of the switch voltage has to be equal to the dc drain supplyvoltage

(7)

Due to the perfect harmonic termination in ideal class-Emode, the power delivered to the output matching network is

(8)

where is the real part of the optimal class-E load impedanceand is the magnitude of the output

current . Substituting from (7) into (8), the power de-livered to the matching network is found to be

(9)

If the output matching network is lossless, the output poweris equal to the power delivered to the resistive load . There-fore, the voltage across the load is proportional to . As a re-sult, the output power of a class-E PA can be varied by varyingthe bias with the following properties.

• The power can theoretically range between zero and max-imal available power.

• For a realistic transistor, the drain bias should be keptabove threshold to avoid significant power gain degrada-tion [10], giving a lower limit to the power range;

• The upper power range limit is given by the max V/I peakhandling capability of the device, which also depends onthe nonlinearity of the output capacitance [10].

• The optimal (ideal) efficiency is not affected when thebias is varied. Namely, the transistor voltage and currentamplitudes change with bias voltage, but not their shape intime domain. Since the waveform shape is responsible forthe high efficiency in class-E mode, the efficiency remainsthe same.

• For the same reason, the optimal class-E load impedanceremains the same.

The lower power limitation is a practical constraint that canbe avoided by using a smaller periphery device for the driverstage amplifier, which was not commercially available for theMESFET used in this work. However, this method is used inthe monolithic PA presented in the next section, while the bias-controlled power method is used for the hybrid PA.

In order to select an optimal bias point an automaticbias/power sweep measurement is performed. The requiredoutput power of the driver stage is between 12–13 dBm. Theconstant , and contours for dBm areshown in Fig. 8. This approach assumes that the is nota function of bias voltage. Although the component of

varies with drain bias [11] these variations are small inthe range of voltages chosen for the measurements in Fig. 8,and efficiency remains high even for low drain bias voltages.

C. Two-Stage Switched-Mode Amplifier

The block diagram of the directly coupled two-stage amplifieris shown in Fig. 1 and the fabricated two-stage hybrid amplifieris shown in Fig. 5(b). The interstage matching network trans-forms the input impedance of the output stage into the optimal


Fig. 8. Bias/power sweep contours of the designed class-E PA for input powerof 5 dBm at 10 GHz. Shown are contours of constant P (solid) and �(dashed). Gain contours are omitted from the plot for the clarity and can beinferred from the P and P . As a result of a compromise between thesethree parameters the bias point for the driver stage is selected (arrows): V =

�1:3 V and V = 1:8 V, resulting in expected G � 7:5 dB, P �

12:5 dBm and � � 60%.

Fig. 9. Measured power sweep of the two-stage switched-mode PA at 10 GHz.The bias point for the first stage is V = �1:3 V and V = 1:8 V whilethe second stage is biased at V = �1:55 V and V = 4:2 V.

class-E impedance for the first stage, and provides the secondharmonic termination. For the initial interstage matching net-work design, the complex conjugate of is used.

Results of power-sweep characterization of the optimizedtwo-stage PA are shown in Fig. 9. The data are measured forconnectorized amplifier. During the optimization process, thefundamental frequency load impedance of the first stage isslightly changed from the initial class-E value. Therefore, thefirst stage operates in an alternative class-E mode, or perhapsin deeply saturated AB class, with an “open” termination at thesecond harmonic frequency. The two-stage amplifier has excel-lent input return loss of 18 dBc at the nominal input powerlevel of 4 dBm, and second and third harmonic levels of 41and 25 dBc, respectively (Fig. 10). High suppression of thesecond harmonic in the output signal is a result of the harmonictraps applied in both amplifier stages. The intermodulation

Fig. 10. Measured second and third harmonic power sweeps of the two-stagePA.

Fig. 11. Frequency sweep of the two-stage amplifier characteristics. The Pis adjusted to maintain the maximal PAE at each frequency point.

TABLE IMEASURED HYBRID TWO-STAGE CLASS-E AMPLIFIER PERFORMANCES

products are measured with a two-tone test signal at 10 GHzwith 100-kHz frequency spacing. As expected, the class-E PAis nonlinear with third-, fifth-, and seventh-order products of

11, 19.7, and 32 dBc, respectively. The frequency sweepof amplifier parameters for maximum PAE is shown in Fig. 11.

Table I summarizes measured performance of the two-stagePA. The performance comparison of the two stages when char-acterized separately is given in Table II. The output power of thefirst stage is estimated.

From the given data it can be concluded that the mainamplifier parameters of both stages are preserved after directconnection.


TABLE IISEPARATELY MEASURED FIRST- AND SECOND-STAGE PERFORMANCES COMPARED TO INTEGRATED HYBRID TWO-STAGE PA PERFORMANCES

Fig. 12. Monolithic InP DHBT class-E output stage.

IV. MONOLITHIC BROADBAND TWO-STAGE PA DESIGN

A. Active Device

The device technology utilized for the MMIC class-E am-plifier has been detailed in [12] and [13]. Briefly, the deviceis based on NGST indium-phosphide double heterojunctionbipolar transistor (InP DHBT) technology and possesses manyessential characteristics for high-efficiency amplifier operation,including low offset voltage, low knee voltage, high breakdownvoltage, and high gain. Class-E operating characteristics at

-band of a typical 1.5 m 30 m 4 emitter finger unitcell are detailed in [6] and [12]. Of primary importance is thehigh gain capability of the device, possessing andvalues of 80 and 150 GHz, respectively. The device is capableof 16-dB linear gain at 20 GHz. Higher gain translates toreduced input signal drive requirements in order to obtainswitching behavior from the active device, as is required forclass-E operation.

A modified Gummel–Poon model was used to simulate thelarge-signal performance of the DHBT device. Model parame-ters were fit to measured dc and -parameter data across var-ious bias conditions. Device model verification, under class-Eoperating conditions, is presented in [12]. The model appears topredict large-signal performance with reasonable accuracy.

B. Two-Stage Amplifier Design

For many pulsed radar applications, prime power is limited,leading to a need for highly efficient transmitter amplifiers.However, amplitude flatness is also required in order to keep

Fig. 13. Measured power characteristics of the class-E output stage at V =

0:55 V and V = 4 V. (a) Frequency sweep at P = 13 dBm. (b) Inputpower sweep at 8 GHz.

range side lobes below an acceptable level. For this investi-gation, a two-stage MMIC class-E amplifier was designed toprovide 24 0.5 dBm ( 250 mW) output power from 8 to10 GHz, while maintaining high PAE. In order to maintain therequired amplitude flatness, maximum PAE cannot be main-tained over the entire bandwidth as compared to narrow-bandamplifier performance.

The class-E output stage consists of two 1.5 m 30 m 4finger devices combined in parallel, resulting in a total emitterarea of 360 m . The devices are combined reactively, takingcare to provide odd-mode instability suppression resistors


Fig. 14. Monolithic high-efficiency InP DHBT two-stage PA.

between the base and collector of each transistor. Based uponthe device model and estimates of device output resistance

and capacitance ( pF), an outputmatching network provides adequate high-impedance termi-nations over the range of second harmonic values [6], whilesimultaneously providing the required fundamental matchingover the frequency band of interest. A single-stage amplifieris designed to test the output stage performance by providinginput matching to maximize gain. A photograph of the designedsingle-stage class-E monolithic PA is shown in Fig. 12.

Measured power results for the output stage matched to 50are shown in Fig. 13. Greater than 43% PAE and 10-dB gain aremaintained over a 7.5–10-GHz bandwidth. A maximum PAEof 55% with a corresponding 11.7 dB of gain was achieved at8 GHz.

Based on the analysis given in Section II, in order to maintaina high overall gain, a class-AB mode of operation is deemedappropriate for the driver stage. The active component for thedriver stage was chosen to be 1.5 m 30 m 2 finger devicewith a total emitter area of 90 m , providing a 4 : 1 ratio inemitter area between the driver stage and output stage. With thisratio, a PAE above 40% for the driver stage is maintained, whilesimultaneously providing adequate power to push the outputstage deep into compression as required for switched-modeoperation.

The driver and output stages are combined utilizing appro-priate impedance transforming networks. The main functionof the interstage matching network is to transform the inputimpedance of the output stage to the required output impedanceof the driver stage. The input of the driver stage is matched formaximum gain. Bias for both stages is provided on chip.

Nonlinear modeling was utilized extensively to obtain therequired output power flatness, while maintaining high PAE,over the frequency range of interest. A photograph of thetwo-stage class-E monolithic PA is shown in Fig. 14. Measuredpower results are shown in Fig. 15. Greater than 40% PAE ismaintained over a 7.7–10.5-GHz bandwidth with a maximumof 52% at 8 GHz. The gain of the two-stage amplifier rangesfrom 24.6 to 23.7 dB over an 8–10-GHz bandwidth.

Fig. 15. Measured power characteristics of the two-stage class-E MMICpower amplifier at V = 0:62 V, V = 4 V, V = 0:55 V, andV = 4 V. (a) Frequency sweep at P = 0 dBm. (b) Input power sweepat 8 GHz.

Comparing the single-stage to the two-stage amplifier an av-erage reduction in PAE of only 3% over 8–10 GHz is observed,with a maximum reduction of 5% at 8.5 GHz. However, overthe same bandwidth, the average gain improves from 11.1 dB,for the single-stage amplifier, to 24.2 dB for the two-stage am-plifier. Characteristics of single-stage and two-stage monolithicPAs at 8.5 GHz are compared in Table III.

V. DISCUSSION

This paper has presented the design of two-stage directly cas-caded high-efficiency -band PAs. The following two methodsare employed to maintain high efficiency while optimizing gain:

1) using the same device for both stages of a hybridMESFET class-E PA with backed-off first-stage bias;


TABLE IIICOMPARED MONOLITHIC OUTPUT STAGE CLASS-E PA AND MONOLITHIC TWO-STAGE CLASS-E PA PERFORMANCES AT 8 GHz

TABLE IVCOMPARED HYBRID/MMIC TWO-STAGE CLASS-E PA PERFORMANCES

2) using a smaller periphery class-AB driver PA with aclass-E larger-periphery device for the second stage in amonolithic high-efficiency PA fabricated by NGST.

Table IV shows a comparison of measured results for the twoamplifiers.

1) Both PAs demonstrate around 52% PAE and well-pre-served individual-stage characteristics. Note that the themeasurements of the hybrid PA include connector loss,while the monolithic PA was measured using a probe sta-tion.

2) The compressed gain of the monolithic PA is higher dueto the higher linear gain of the HBT devices compared tothe MESFET gain.

3) Due to the larger , InP DHBTs are well suited for thismode of operation.

4) The monolithic PA is designed using harmonic balancesimulations to have a % with minimal gainand power variations over 31% bandwidth. In contrast,the hybrid PA is designed using basic theory augmentedby load–pull at a single frequency. Although not designedto be broadband, it exhibits a 15% bandwidth for PAE40%.

The general conclusions that can be drawn as a result ofthis work, including some recommendations for two-stageefficiency-optimized PA design, are as follows.

1) Although the driver stage consumes less power than theoutput stage, it is important to optimize its efficiency, asit directly determines the total PAE.

2) The class of operation of the driver stage should be deter-mined by the gain requirement: for higher gain, class ABwill give optimal overall efficiency performance, whilefor highest overall efficiency, class E is recommended.

3) If different periphery devices are not available, it is pos-sible to achieve very high total efficiency by bias adjust-ment of the driver stage, due to the unique properties ofthe class-E mode of operation.

4) Efficiency is optimized when the two amplifier stages aredirectly cascaded with an interstage network. The designof this network is not straightforward due to the bilateralcharacter of both stages.

5) Hybrid and monolithic versions with different devicetypes (e.g., MESFET and HBT in this study) can give

comparable efficiency results if all parasitics in the hybriddesign are modeled appropriately.

6) The efficiency-optimized two-stage PA is nonlinear. Well-known linearization techniques, such as envelope elimina-tion and restoration (EER) [4], can be modified to applyto two stages.

In summary, this paper experimentally demonstrated at-band that the total efficiency of a two-stage PA can approach

that of a high-efficiency output stage, both for hybrid andmonolithic amplifiers. Such amplifiers are good candidatesfor active antenna array transmit modules in radar, as well ascommunication transmitters in which the signals have constantenvelope. By adding dynamic bias control [4], these amplifierscan also be used for signals with varying envelopes.

ACKNOWLEDGMENT

The authors are grateful to A. Gutierrez, D. Sawdai,E. Kaneshiro, W. Lee, and A. Oki, all of Northrop GrummanSpace Technology, Redondo Beach, CA, for monolithic PAfabrication and many useful discussions.

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[24] T. Sowlati, C.A.T. Salama, J. Sitch, G. Rabjohn, and D. Smith, “Lowvoltage, high efficiency GaAs class E power amplifiers for wire-less transmitters,” IEEE J. Solid-State Circuits, vol. 30, no. 10, pp.1074–1080, Oct. 1995.

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Srdjan Pajic (S’02) received the Dipl. Ing. degreefrom the University of Belgrade, Belgrade, Serbiaand Montenegro, in 1995, and the Ph.D. degreein electrical and computer engineering from theUniversity of Colorado, Boulder, in 2005.

From 1995 to 2000, he was a Research and DesignEngineer with IMTEL Microwaves, Belgrade, Serbiaand Montenegro, where he was involved with the de-velopment of PAs for radio and TV broadcast sys-tems. His research interests include high-efficiencymicrowave PAs for active antennas, linear PAs for

wireless communications, and spatial power-combining techniques.

Narisi Wang (S’00) received the B.S. degree inelectrical engineering from the Beijing Universityof Posts and Telecoms, Beijing, China, in 1999,the M.S. degree in electrical engineering fromColorado State University, Fort Collins, in 2001, andis currently working toward the Ph.D. degree at theUniversity of Colorado at Boulder. Her master’s re-search concerned mathematical modeling of coaxialprobe crack detection. Her doctoral research is indynamic biasing of high-efficiency microwave PAs.

Paul M. Watson (M’01) received the B.S. and M.S.degrees from the University of Utah, Salt Lake City,in 1991 and 1993, respectively, and the Ph.D. degreefrom the University of Colorado at Boulder, in 1998,all in electrical engineering.

He is currently a Research Engineer with theSensors Directorate, Air Force Research Laboratory,Wright-Patterson AFB, OH. His research inter-ests include microwave/millimeter-wave PAs andlow-noise amplifier techniques.

Tony K. Quach (M’98) received the B.S.E.E. de-gree from Wright State University, Dayton, OH, in1988, and the M.S.E.E. degree from the Universityof Dayton, Dayton, OH, in 1994.

Since 1989, he has been involved with the researchand development of solid-state microwave devicesand integrated circuits at the Sensors Directorate,Air Force Research Laboratory, Wright-PattersonAFB, OH. He has been involved in the developmentof ultrahigh-efficiency PAs and low-power-drain/ro-bust low-noise amplifiers for space-based radar

applications. He is currently the Principal Investigator of the RFIC projectfor the Air Force Research Laboratory, engaging in the demonstration ofreceiver-on-a-chip for future U.S. Department of Defense phase array systems.He has authored or coauthored over 50 publications. He holds 12 patents onmicrowave device fabrication.

Zoya Popovic (S’86–M’90–SM’99–F’02) receivedthe Dipl. Ing. degree from the University of Belgrade,Belgrade, Serbia, in 1985, and the Ph.D. degree fromthe California Institute of Technology, Pasadena, in1990.

She is currently a Full Professor of electrical andcomputer engineering at the University of Colorado,Boulder. Her research interests include microwaveand millimeter-wave quasi-optical techniques,high-efficiency microwave circuits, intelligent RFfront ends, smart antenna arrays, RF-optical tech-

niques, and wireless powering of sensor arrays and implanted sensors. Shehas coauthored (with her father) Introductory Electromagnetics (Upper SaddleRiver, NJ: Prentice-Hall, 2000) for the junior-level core course for electricaland computer engineering students.

Dr. Popovic was the recipient of the 1993 IEEE Microwave Prize presentedby the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) for thebest journal paper. She was the NSF Presidential Faculty Fellow in 1993, and re-ceived the 1996 URSI Issac Koga Gold Medal and the 2001 ASEE/HP TermanAward for combined teaching and research excellence. In 2000, she spent sixmonths at the Technical University of Munich as a recipient of the Humboldt Re-search Award for Senior U.S. Scientists from the German Alexander von Hum-boldt Stiftung.

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