introduction to field programmable gate arrays (fpgas) coe 203 digital logic laboratory dr. aiman...
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Introduction toField Programmable Gate
Arrays (FPGAs)COE 203
Digital Logic Laboratory
Dr. Aiman El-Maleh
College of Computer Sciences and Engineering
King Fahd University of Petroleum and Minerals
Introduction to FPGAs COE 203 – Digital Design Lab – KFUPM slide 2
Outline What is an FPGA
CLB Slice Structure
LUT (Look-Up Table) Functionality
Advantges of using FPGAs
FPGA Design Flow
Digilent Spartan-3 Board
FPGA Device Part Marking
Introduction to FPGAs COE 203 – Digital Design Lab – KFUPM slide 3
What is an FPGA? … A filed programmable gate array (FPGA) is a
reprogrammable silicon chip.
Using prebuilt logic blocks and programmable routing resources, you can configure these chips to implement custom hardware functionality without ever having to pick up a breadboard or soldering iron.
You develop digital computing tasks in software and compile them down to a configuration file or bitstream that contains information on how the components should be wired together.
Introduction to FPGAs COE 203 – Digital Design Lab – KFUPM slide 4
… What is an FPGA ?
Block R
AM
s
Block R
AM
s
ConfigurableLogicBlocks
I/OBlocks
BlockRAMs
Introduction to FPGAs COE 203 – Digital Design Lab – KFUPM slide 5
CLB Slice Structure Each slice contains two sets of the following:
Four-input LUT Any 4-input logic function,
or 16-bit x 1 sync RAM
or 16-bit shift register
Carry & Control Fast arithmetic logic
Multiplier logic
Multiplexer logic
Storage element Latch or flip-flop
Set and reset
True or inverted inputs
Sync. or async. control
Introduction to FPGAs COE 203 – Digital Design Lab – KFUPM slide 6
LUT (Look-Up Table) Functionality
• Look-Up tables are primary elements for logic implementation
• Each LUT can implement any function of 4 inputs
x1 x2 x3 x4
y
x1 x2
y
LUT
x1x2x3x4
y
0x1
0x2 x3 x4
0 00 0 0 10 0 1 00 0 1 10 1 0 00 1 0 10 1 1 00 1 1 11 0 0 01 0 0 11 0 1 01 0 1 11 1 0 01 1 0 11 1 1 01 1 1 1
y0100010101001100
0x1
0x2 x3 x4
0 00 0 0 10 0 1 00 0 1 10 1 0 00 1 0 10 1 1 00 1 1 11 0 0 01 0 0 11 0 1 01 0 1 11 1 0 01 1 0 11 1 1 01 1 1 1
y1111111111110000
x1 x2 x3 x4
y
x1 x2 x3 x4
y
x1 x2
y
x1 x2
y
LUT
x1x2x3x4
y
0x1
0x2 x3 x4
0 00 0 0 10 0 1 00 0 1 10 1 0 00 1 0 10 1 1 00 1 1 11 0 0 01 0 0 11 0 1 01 0 1 11 1 0 01 1 0 11 1 1 01 1 1 1
y0100010101001100
0x1
0x2 x3 x4
0 00 0 0 10 0 1 00 0 1 10 1 0 00 1 0 10 1 1 00 1 1 11 0 0 01 0 0 11 0 1 01 0 1 11 1 0 01 1 0 11 1 1 01 1 1 1
y0100010101001100
0x1
0x2 x3 x4
0 00 0 0 10 0 1 00 0 1 10 1 0 00 1 0 10 1 1 00 1 1 11 0 0 01 0 0 11 0 1 01 0 1 11 1 0 01 1 0 11 1 1 01 1 1 1
y1111111111110000
0x1
0x2 x3 x4
0 00 0 0 10 0 1 00 0 1 10 1 0 00 1 0 10 1 1 00 1 1 11 0 0 01 0 0 11 0 1 01 0 1 11 1 0 01 1 0 11 1 1 01 1 1 1
y1111111111110000
Introduction to FPGAs COE 203 – Digital Design Lab – KFUPM slide 7
Routing Resources
PSM PSM
CLB
PSM PSM
CLB CLB
CLBCLB CLB
CLBCLB CLB
ProgrammableSwitchMatrix
Introduction to FPGAs COE 203 – Digital Design Lab – KFUPM slide 8
Advantages of using FPGAs Creating intricate circuit designs from discrete parts, such as TTL
chips, can be very tedious and error prone.
It can take a large number of chips to create a design of only moderate complexity.
It takes a lot of time to wire together a large number o f chips. Additionally, it can often be difficult to find misplaced wires when debugging a complex circuit.
Using FPGAs, it is possible to implement a complex logic design in a manner which is easy to test, debug and even change.
Using FPGAs, If the device does not function as it should, it is only necessary to debug the program as opposed to debugging the wiring of a circuit made from discrete chips.
Introduction to FPGAs COE 203 – Digital Design Lab – KFUPM slide 9
FPGA Design Flow
Introduction to FPGAs COE 203 – Digital Design Lab – KFUPM slide 10
Xilinx ISE 7.1i
Introduction to FPGAs COE 203 – Digital Design Lab – KFUPM slide 11
Digilent Spartan-3 Board 200K gate Xilinx Spartan-3 FPGA
8 slide switches
4 pushbuttons
8 LEDs
4-digit seven-segment display
Serial port
VGA port
PS/2
And others ....
Introduction to FPGAs COE 203 – Digital Design Lab – KFUPM slide 12
FPGA Device Part Marking
We’re Using: Spartan 3 XC3S200-ft256