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Computer Organization & Architecture -COA511s

First Opportunity Examination-June 2014

CURRICULUM 07 BACS, BACHELOR OF COMPUTER SCIENCE

MODULE CODE COASllS

MODULE COMPUTER ORGANISATION AND ARCHITECTURE

DATE JUNE EXAMINATION -15r OPPORTUNITY 2014

DURATION 2 HOURS

TOTAL MARKS 100

EXAMINER(S) A.M. GAMUNDANI & J. LUMBASI

MODERATOR F. BHUNU SHAVA

INSTRUCTIONS

1. Answer all questions in Section A, B and C in the provided answer sheets. 2. When answering questions, you should be guided by the allocation off marks. Do

not give too few or too many facts in your answers. 3. You may use calculators in this paper, but show all steps taken to get to the

answer. 4. This Question paper consists of five (5) printed pages including this cover page.

Ensure you have a complete paper.

Page 1 of 5

Section A: [10 Marks] -Answer All Questions. Each Question Weighs 1 Mark.

1. Computer organization refers to attributes of a system visible to the programmer [True/False] .

2. In general, the more devices attached to the bus, the greater the bus length and hence the

greater the propagation delay [True/False].

3. The two traditional forms of RAM used in computers are DRAM and SRAM[True/False].

4. RAID level 0 is not a true member of the RAID family because it does not include redundancy to improve performance [True/False].

5. The end user is concerned mainly with the computer's architecture [True/False].

6. The OS must determine how much processor time is to be devoted to the execution of a

particular user program [True/False].

7. The decimal system is a special case of a positional number system with radix 1 0 and with digits in the range 0 through 9 [True/False].

8. Pipelining is a means of introducing parallelism into the essentially sequential nature of a machine-instruction program [True/False].

9. RISC processors are more responsive to interrupts because interrupts are checked between rather elementary operations [True/False].

10. Machine parallelism exists when instructions in a sequence are independent and thus can be executed in parallel by overlapping [True/False].

Section B: [15 Marks]- Answer All Questions. Each Question Weighs 1 Mark.

11. A common example of system interconnecti on is by means of a _ ___ _

A. Register C. Data transport

12. The ENIAC used --- --

A. Vacuum tubes C. lAS

B. System bus D. Control device

B. Integrated circuits D. Transistors

13. The _____ measures the ability of a computer to complete a single task.

A. clock speed C. execute cycle

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B. Speed metric D. Cycle time

14. _____ refers to whether memory is internal or external to the computer.

A. Location C. Hierarchy

B. Access D. Tag

15. "Memory is organized into records and access must be made in a specific linear sequence" is a description of ____ _

A. Sequential access C. Random access

B. Direct access D. Associative

16. A portion of main memory used as a buffer to hold data temporarily that is to be read out to disk is referred to as a

A. Disk cache C. Virtual address

----

B. Latency D. Miss

17. is the simplest mapping technique and maps each block of main memory into only one possible cache line.

A. Direct mapping C. Set associative mapping

18. Which of the following memory types are nonvolatile?

A. Erasable PROM C. Flash memory

B. Associative mapping D. None of the above

B. Programmable ROM D. Al l of the above

19. The contains logic for performing a communication function between the peripheral and the bus.

A. I/0 channel C. I/0 processor

20. In the number 3109, the 3 is referred to as the ___ _

A. Most significant digit C. Radix

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B. I/0 module D. I/0 command

B. Least significant digit D. Base

21. The binary string 110111100001 is equivalent to _ __ _

A. DE1J6 C. FF6416

B. C?816 D. B8F16

22. _ _ _ __ representation is almost universally used as the processor representation for integers.

A. Biased C. Sign-magnitude

B. Twos compliment D. Decimal

23. The superscalar approach can be used on _____ architecture.

A. RISC B. CISC C. Neither RISC nor CISC D. Both RISC and CISC

24. The situation where the second instruction needs data produced by the first instruction to

execute is referred to as -----

A. True data dependency

C. Procedural dependency

B. Output dependency

D. Antidependency

25. A _____ is an instance of a program running on a computer.

A. Process C. Thread

B. Process switch D. Thread switch

Section C [75 Marks]: Answer All Questions.

1. (a) Briefly explain the distinction between computer organization and computer architecture? [4 Marks]

(b) Describe the mapping functions used in implementing cache memory. [6 Marks]

(c) Give reasons why peripherals are usually not connected to the system bus.

[4 Marks]

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2. (a) Define an Instruction set Architecture (ISA)

(b) Explain any two ways available to measure I/0 performance.

[2 Marks]

[4 Marks]

3. (a) Explain the concept of miss penalty and out of order execution in processors.

[6 Marks] (b) Evaluate the following decimal integer computations, using the two's

compliment, represent your answers an binary numbers

(i)(-8) + 4 (ii) 3 -8

[2 Marks] [2 Marks]

(c) Which two rules did you apply in solving b (i) and b (ii) respectively? [2 Marks]

4. (a) Demonstrate the two's compliment operation using (-14), (a signed decimal integer).

5.

[3 Marks)

(b) Distinguish between Hardware and Software speculation mechanisms [4 Marks]

(a) In brief, describe the following RAID levels: - 0, 2, 4 and 6. [8 Marks]

(b) You want to improve performance of a system's memory. Describe how the

following may affect performance.

(i) Size of cache (li) Size of main memory

(c) Explain how interrupts in bus arbitration are handled.

[2 Marks] [2 Marks)

[6 Marks]

6. (a) Suppose three values (x , y and z) are stored in a machine's memory. Describe the

sequence of events (loading registers from memory, saving values in memory, and so

on) that lead to the computation of x + y +z. [8 Marks]

(b) Explain any two major functions of an I/0 Module. [4 Marks]

7. (a) Explain the distinction between Instruction level parallelism and Machine

parallelism [4 Marks]

(b) What is the purpose of swapping in operating system functionality? [2 Marks]

*** **END OF EXAMINATION PAPER*** **

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