lecture 6

240-451 VLSI, 2000

1

Lecture Lecture 6 6

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut

Complex NMOS

240-451 VLSI, 2000

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In the Past

AA

CC

AA

BB

CC

YY

VVDDDD AA

BB

CC

YY

VVDDDD

AA

CC

BB BB

240-451 VLSI, 2000

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Memory NMOS

240-451 VLSI, 2000

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Dynamic RAM

1. Dynamic RAM using 6 NMOS

VDD

C

B

High bit rateword sequential

1

A

1

B

240-451 VLSI, 2000

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2. Dynamic RAM using 4 NMOS

Dynamic RAM

C B 1

w ord lin e

C B 2

C g 1 C g 2

X W ZY

B 1 - b it lin e B 2 - b it lin eRow select

240-451 VLSI, 2000

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X W

C B 1 C B 2

Y

ZT 1

T 2

T 4 C B 2

B1 - bit line B2 - bit line

Dynamic RAM using 4 NMOS

240-451 VLSI, 2000

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Read Dynamic RAM using 4 NMOS

C B 1

w ord lin e

C B 2

C g 1 C g 2

X W ZY

B 1 - b it lin e B 2 - b it lin e

off on

Activate word line

II = 0

240-451 VLSI, 2000

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C B 1

w ord lin e

C B 2

C g 1 C g 2

X W ZY

B 1 - b it lin e B 2 - b it lin e

Write “0” in Dynamic RAM using 4 NMOS

0 1

ONOFF

Cg2 Release Q until not have I at T2, then Cg1 charge Q until T1 ONFlip/Flop

240-451 VLSI, 2000

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input

W rite

W rite R ea d

XY

Z bit line1

Read/write start at = 1

240-451 VLSI, 2000

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input

W rite

W rite R ea d

XY

Z bit line

0

write and = 1

off

Y = 1

240-451 VLSI, 2000

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input

W rite

W rite R ea d

XY

Z bit line

1

write and = 0

Off

No changing

240-451 VLSI, 2000

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input

W rite

W rite R ea d

XY

Z bit line

write and = 0 / read and = 1

ON

If Y = 1 bit line = 0if Y= 0 bit line = 1

OFF

Off when Y = 0

240-451 VLSI, 2000

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C s

read/ w rite line

bit line

240-451 VLSI, 2000

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Write into Dynamic RAM using 1 NMOS

C s

read/ w rite line

bit lineValue whichwant to write‘0’ or ‘1’

1

Write ‘1’ with charge Cs

Write ‘0’ with nocharge Cs

240-451 VLSI, 2000

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C s

read/ w rite line

bit line‘0’ or ‘1’detect withsense amplifier

0

discharge Q

240-451 VLSI, 2000

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Static RAM

240-451 VLSI, 2000

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ROM

• PROM (mask programmable rom)• EPROM (erasable programmable rom)• EEPROM (electrically erasable programmable

rom)

240-451 VLSI, 2000

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Memory Structure in VLSI

240-451 VLSI, 2000

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ROM circuit, 4x4 bit NOR based ROM Array

240-451 VLSI, 2000

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240-451 VLSI, 2000

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4x4 bit NAND based ROM Array

240-451 VLSI, 2000

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Shift Register

• temporary memory using in Data path

input output

Half register Half register

240-451 VLSI, 2000

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Half Register

Half register

input

R / 2

X1

X2

Xn

240-451 VLSI, 2000

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Data Path

input input

R / 2

X1

X2

Xn

Combination R / 2 Combination

240-451 VLSI, 2000

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PLA (Programmable logic arrays)

• Built by R. Preobsting

NOR-NOR Structure (Product of Sum)

240-451 VLSI, 2000

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PLA (Programmable logic arrays)

Change to be NOR logic before program

240-451 VLSI, 2000

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How to program PLA

lecture 6

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