logic units decoding and mux binary · pdf filebinary addition and subtraction. ... •...
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Chapter 10Chapter 10
BINARY ARITHMETIC, DECODING AND MUX
LOGIC UNITS
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 2
Lesson 1
Binary Addition and Subtraction
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 3
Outline
• Half Adder • Full Adder• Addition of two 4-bit numbers• Addition using a MSI IC• Subtraction
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 4
Half adder
• Cy'0 —carry bit obtained at an output of adder circuit,
• S — sum bit obtained at another output• Circuit is called half adder (H.A.) if
A add B = S plus Cy’0
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 5
Half Adder 2 inputs and 2 outputs
0 0 0 0
Inputs Outputs A B S Cy’0
0 1 1 0 1 0 1 01 1 0 1
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 6
Half Adder
• Circuit
A B
Cy’0
S
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 7
Outline
• Half Adder • Full Adder• Addition of two 4-bit numbers• Addition using a MSI IC• Subtraction
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 8
Full adder
• Cyi–1 and Cyi —carry bits at the input and output of adder circuit at ith place,
• S — sum bit obtained at another output• Circuit is called full adder (H.A.) if
Cyi–1 add A add B = S plus Cyi'• Place from right most to the leftmost in
a number — 0 to n–1
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 9
Full Adder 2 inputs and 2 outputs
0 0 0 0 0
Inputs Outputs A B Cyi–1 S Cyi
0 0 1 1 0 0 1 0 1 00 1 1 0 11 0 0 1 01 0 1 0 1 1 1 0 0 11 1 1 1 1
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 10
Full Adder
• Circuit
A B
Cy’0
SCyi–1
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 11
Outline
• Half Adder • Full Adder• Addition of two 4-bit numbers• Addition using a MSI IC• Subtraction
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 12
4-bit Adder
F.A F.AF.AF.A
S3 S2 S1 S0
Cy3 Cy2 Cy1 Cy0 Cy-1
0
A3 B3 A2 B2 A1 B1 A0 B0
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 13
Outline
• Half Adder• Full Adder• Addition of two 4-bit numbers• Addition using a MSI IC• Subtraction
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 14
4-bit Adder circuitMSIIC 7483
A3B3A2B2A1B1A0B0
S3 S2 S1 S0Cyi-1
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 15
Outline
• Half Adder• Full Adder• Addition of two 4-bit numbers• Addition using a MSI IC• Subtraction
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 16
Subtraction
• Subtraction of B from A is addition of binary number A and two’s complement of B
• Two’s complement of B is addition of 1 with 1’s complement of B.
• A method to find 1’s complement of a bit is using an XOR at which one of the input = 1
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 17
4-bit Adder Cum subtractor
F.A F.AF.AF.A
S3 S2 S1 S0
Cy3 Cy2 Cy1 Cy0 Cy-1
= 0 for Add= 1 forsubtract
A3 A2 A1 A0
B0B2B3B1
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 18
4-bit Adder/Subtractor circuit
MSIIC 7483
A3B3A2B2A1B1A0B0
S3 S2 S1 S0Cyi-1
Add/subtract
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 19
Summary
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 20
Addition
• Full adder takes two bits in input and outs sum bit and carry bit
• Full adder takes carry and two bits in input and outs sum bit and carry bit
• XOR gate generates carry• 3-AND- 1-OR array generated Sum
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 21
Subtraction
• Second input of full adder is through an XOR
• XOR connects other input to Sub/Add control signal and when 1 then full adder implements subtractor.
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 22
End of Lesson 1 on
Binary Addition and Subtraction
Ch10L1-"Microcontrollers....", Raj Kamal, from Pearson Education, 2005 23
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