power grid synchronization failure detection

26
Under the Guidance of Er. Sonu Kumar Submitted by Bhoop Narain Pathak (1273720008) Rajesh Kumar(1273720036) Jay Hind(1273720019) Branch-Electrical Engineering, Final Year Power Grid Synchronization Failure Detection

Upload: jay-hind

Post on 14-Feb-2017

325 views

Category:

Engineering


3 download

TRANSCRIPT

Page 1: power grid synchronization failure detection

Under the Guidance of Er. Sonu Kumar Submitted by Bhoop Narain Pathak (1273720008) Rajesh Kumar(1273720036) Jay Hind(1273720019)

Branch-Electrical Engineering, Final Year

REC AMBEDKAR NAGAR (U.P.)

Power Grid Synchronization Failure Detection

Page 2: power grid synchronization failure detection

Synchronization means the minimization of difference in voltage, frequency and phase angle between the corresponding phases of the generator output and grid supply. An alternating current generator must be synchronized with the grid prior to connection. It can’t deliver the power unless it is running at same frequency as the network.

Synchronization must occur before connecting the generator to a grid. Synchronization can be achieved manually or automatically. The purpose of synchronization is to monitor, access, enable, and automatically take the control action to prevent the abnormalities of voltage and frequency.

Page 3: power grid synchronization failure detection

Voltage fluctuation : When a generator is synchronized with a power grid. There is a voltage fluctuation on the distribution line. During synchronization the voltage fluctuation should not

exceed 7% at the at the point of common coupling.

Limits allowing for synchronization are : Phase angle- +/-20 degrees Maximum voltage difference – 7% Maximum slip frequency – 0.44%

Page 4: power grid synchronization failure detection

Lighting is one of the main causes for power system faults.

The major advantage is detecting the synchronization failure between generators and power grid.

When there is an Under/over voltage or under/over frequency.

The comparator will detect the difference the actual power and reactive power.

If there is no failure of power grid synchronization then the detectors will give the zero values.

Page 5: power grid synchronization failure detection

BLOCK DIAGRAM

Page 6: power grid synchronization failure detection

HARDWARE REQUIREMENTS

POWER SUPPLY MICROCONTROLLER 555 TIMER LM358 LM339 RELAYS BC547 LIQUID CRYSTAL DISPLAY LED IN4007 RESISTORS CAPACITORS

Page 7: power grid synchronization failure detection

230 V AC 50 Hz

5V DC

12V step down transformer

Filter(470µf)

5v RegulatorBridge rectifier

Page 8: power grid synchronization failure detection

It is a smaller computer Has on-chip RAM, ROM, I/O ports...

RAM ROM

I/O Port Timer

Serial COM Port

Microcontroller

CPU

A single chip

Page 9: power grid synchronization failure detection

CPU

On-chip RAM

On-chip ROM for program code

4 I/O Ports

Timer 0

Serial PortOSC

Interrupt

Control

External interrupts

Timer 1

Timer/Counter

Bus Control

TxD RxDP0 P1 P2 P3

Address/Data

Counter Inputs

Page 10: power grid synchronization failure detection

8K Bytes of In-System Programmable (ISP) Flash Memory

Endurance: 10,000 Write/Erase Cycles

4.0V to 5.5V Operating Range

Fully Static Operation: 0 Hz to 33 MHz

256 x 8-bit Internal RAM

32 Programmable I/O Lines

Three 16-bit Timer/Counters

Eight Interrupt Sources

Full Duplex UART Serial Channel

Interrupt Recovery from Power-down

Mode

Dual Data Pointer

Page 11: power grid synchronization failure detection

555 TIMERThe 555 Timer IC is an integrated circuit (chip) implementing a variety of timer and multivibrator applications

The 555 has three operating modes:

•Monostable mode: in this mode, the 555 functions as a "one-

shot". Applications include timers, missing pulse detection,

switches, touch switches, frequency divider, capacitance

measurement, pulse-width modulation (PWM) etc.

•Astable - free running mode: the 555 can operate as an

oscillator. Uses include LED and lamp flashers, pulse

generation, logic clocks, tone generation, security alarms,

pulse position modulation, etc.

•Bistable mode or Schmitt trigger: the 555 can operate as a

flip-flop, if the DIS pin is not connected and no capacitor is

used. Uses include bounce free latched switches, etc.

Page 12: power grid synchronization failure detection

Pin Name Purpose

1 GND Ground, low level (0 V)

2 TRIG OUT rises, and interval starts, when this input falls below 1/3 VCC.

3 OUT This output is driven to +VCC or GND.

4 RESET A timing interval may be interrupted by driving this input to GND.

5 CTRL "Control" access to the internal voltage divider (by default, 2/3 VCC).

6 THR The interval ends when the voltage at THR is greater than at CTRL.

7 DIS Open collector output; may discharge a capacitor between intervals.

8 V+, VCC Positive supply voltage is usually between 3 and 15 V.

Internal architecture of 555 timer

Page 13: power grid synchronization failure detection

LM339( COMPARATOR)

The LM339 consists of four independent precision voltage comparators

The LM339 series was designed to directly interface with TTL and CMOS.When operated from both plus and minus power supplies, the LM339

series will directly interface with MOS logic where their low power drain is a

distinct advantage over standard comparators.

Page 14: power grid synchronization failure detection

FEATURESWide single supply voltage range 2.0VDC TO 36VDC or dual

supplies ±1.0VDC to ±18VDC

Very low supply current drain (0.8 ㎃ ) independent of supply voltage

(1.0 ㎽ /comparator at 5.0VDC)

Low input biasing current 25 ㎁

Low input offset current ±5 ㎁ and offset voltage

Input common-mode voltage range includes ground

Differential input voltage range equal to the power supply voltage

Low output 250 ㎷ at 4 ㎃ saturation voltage

Output voltage compatible with TTL, DTL, ECL, MOS and CMOS

logic system

Moisture Sensitivity Level 3

Page 15: power grid synchronization failure detection
Page 16: power grid synchronization failure detection

IT IS A ELECTRO MAGNETIC SWITCH

USED TO CONTROL THE ELECTRICAL DEVICES

COPPER CORE MAGNETIC FLUX PLAYS MAIN ROLE HERE

Page 17: power grid synchronization failure detection

The relay's switch connections are usually labeled COM, NC and

NO:

COM = Common, always connect to this; it is the moving part of

the itch.

NC = Normally Closed, COM is connected to this when the relay

coil is off.

NO = Normally Open, COM is connected to this when the relay

coil is on

Page 18: power grid synchronization failure detection

BC547 (NPN –Transistor)

The BC547 transistor is an NPN Epitaxial

Silicon Transistor.It is used in general-purpose switching and

amplification BC847/BC547 series 45 V, 100

mA NPN general-purpose transistors.

The ratio of two currents (Ic/Ib) is called the DC Current Gain of

the device and is given the symbol of hfe or nowadays Beta, (β).

Page 19: power grid synchronization failure detection

The current gain from the emitter to the collector

terminal, Ic/Ie, is called Alpha, (α), and is a function of the

transistor itself

Page 20: power grid synchronization failure detection

LIQUID CRYSTAL DISPLAY (LCD)

Most common LCDs connected to the microcontrollers are

16x2 and 20x2 displays. This means 16 characters per line by 2 lines and 20

characters per line by 2 lines, respectively. The standard is referred to as HD44780U, which refers to

the controller chip which receives data from an external

source (and communicates directly with the LCD.

Page 21: power grid synchronization failure detection

LCD BACKGROUND

If an 8-bit data bus is used the LCD will require 11 data lines

(3 control lines plus the 8 lines for the data bus)The three control lines are referred to as EN, RS, and RWEN=Enable (used to tell the LCD that you are sending it data)RS=Register Select (When RS is low (0), data is treated as a command)

(When RS is High(1), data being sent is text data )R/W=Read/Write (When RW is low (0), the data written to the LCD)

(When RW is low (0), the data reading to the LCD)

Page 22: power grid synchronization failure detection

Keil an ARM Company makes C compilers, macro assemblers, real-

time kernels, debuggers, simulators, integrated environments,

evaluation boards, and emulators for ARM7/ARM9/Cortex-M3,

XC16x/C16x/ST10, 251, and 8051 MCU families.

Compilers are programs used to convert a High Level Language to

object code. Desktop compilers produce an output object code for the

underlying microprocessor, but not for other microprocessors.

Page 23: power grid synchronization failure detection

This project is applicable for Solar Power Plant where

frequency varies; frequency and voltage parameters should

match with the Power grid.This system will help us to get uninterrupted power supply.

This system will be helpful for industrial areas where continuous electricity is needed.

This system can also be apply on small power house to provide uninterrupted power supply in homes.

Page 24: power grid synchronization failure detection

The advantage of this project is, it’s secured the Power of the Grid i.e., Power Plants should supply power to the grid rather than drawing the power from the grid.

Page 25: power grid synchronization failure detection

The disadvantage of this project is, it’s available in

single phase supply where power Grid is of Three

Phase supply.

Page 26: power grid synchronization failure detection

THANKYOU