register clk - uniroma2.it
TRANSCRIPT
��� �� � �� � �� � � � � �� � � � � �
� � � � �� � � �
� �� � � � � � �� � � �
� �� � � � � � � � � � � � �
� � � � � � � � � � � � � � � ��
� �� � � � � � � �
� � � � � � � � � � � � � � � � � � �� � � � � � �
� � � � � �� �
� � � � � � � � � � � � � �� � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
�� � � �� � � �
CLK
CLR (Clear)
LD (Load)
n
n
Data input x
Data output z
REGISTER
Control inputs
�� ��� �� � �� � � � � �� � � � � � � �� �� �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
�� � � �� � � � � � � �� � � � � �� � � � � � � �
� � � �� � � � � ��� �� � � � � � �� ��� �� �
�� �� � � � ��� � � � � � �� � � � � �� � � � � � � �� ��� � ��� � � � � � � � � ��� � � � � � � �� ��� � �
� � � � � � �� � � � � � �� � � � �� � � � � � � � � � �
� ��� � � � � !!!!!!
" !!!!!!#� ��� � $% �� ��� � � � &' ( � � � ��� � � �
� ��� � $% �� ��� � � � &' ( � � � ��� � � �
)�* � � � * + $% � � � ��� � � �
� ��� � � � ��� �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� � � � � � � � � � � � � � � � � � � � � � � �
z3
x3
z2
x2
z1
x1
z0
x0
CLR
CLK
LD
DQQ’
DQQ’
DQQ’
DQQ’
01MUX
01MUX
01MUX
01MUX
� � ��� �� � � � � �� � � � � � �� � � � �� �� � � �� � � � � ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
�� � � � � � � � � � � � � � �� � �
Clock CLK
Input
Load LD
Output
tp
z
x
propagation delay
setup timetsu
�� ��� �� � �� � � � � � � � � � � � � �� �� � � � � ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � �� � � �� � � �� ��� � � � �
� � � � � � ��� � � � � � � � � � � � �� ��� � ��� � � � � � � � � � �� ��� � �� � � � �� � � � � � � � � � �� � �
� � � � � � �� � � � � � �� � � � �� � � � � � � � � � ��
� � �� �
� � � � � �
* * * * * �
* � * � � �
� � � � � *
� * � * * *
� �
� � � � � � ��� �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
�� �� � � � � � � � � � � � � � � �
� � � ��� � � � � � ��� �� �
y’1y1x’x
CLK
y1
x’
y0
x
y0
x’
x
Y1
Y0
y1
y0
(a)
D flip-flops
y’1
� � ��� �� � �� � � � �� � �� � � � � �� � �� � � �� � � � � � �� � � � � � � � �� � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� � � � � � � � � � � � � � � � � � �� � �
� � � � � �� �� � �(b)
CLKCLR
LDY1
Y0
y1
y0
x
0
Reg
iste
r
� � ��� �� � � � � � � �� � � � � �� � �� � �� � � �� � � � � � �� � �� � � � � � � �� � �� �� � � � � � � �� � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
�� � � � � � � �� � � �
CLK
CTRL
n
n
SHIFT REGISTER
Serial data input(left shift)
Serial data input(right shift)
xlxr
2
Parallel data input x
zParallel data output
� � �� �� � � � � � � � � �� � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� �� �� � � � � ��� �� � � � � � � � � � � � � � � � � � � � � � � � �� � �
CLK
CTRL
xr
2
xln-1
xn-1
zn-1
n-2
xn-2
zn-2
0
x0
z0
� � ��� �� � � � � � � �� � � � � � � �� � �� � � � � � � � � � � �� � � � � � � � � � � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � �� � � � � �� � � � � � � �
� � � �� � � � � �� � � � � � � �� ��� � �
� � � � � ��� �� �
� � � � � � � �� � �� � � �� � � � � � � ��� � � � � � � � � �� � � � � � � �� ��� � � � � � � � � � � ��� � � � � � � �� ��� � �
� � � � � �� � � � � � � � �� � � � �� � � � � � � � � � ��
� � � � � � � !!!!!!!!!!
" !!!!!!!!!!#� ��� � $% � � � � � � � � �
� ��� � $% � � � � � � �� �
� � ��� � � � � � � � � $% � � � � � �� � �
� � � � �� � � � � � $% � � � � � �� � �
� � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� ��� � � � � � � � � � � � � � �
�� � �� � � � ��� � � � � � ��� � � �
� � � � * � * �
� �� � � � � *
�� � � � � � � � * � *
�� � � � � � � � * � �
�� � � � � � � * * � *
�� � � � � � � � * � *
� � � � � �
� � � � * *
�� � � * �
�� � � � *
� �� � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �
� � � � � � � � � � � � � �� � � �� � � �� � �
01
MUX
23 01
MUX
23 01
MUX
23 01
MUX
23
c1c0
DQ
DQ
DQ
DQ
xr
CK
x3 x2 x1 x0xl
z3 z2 z1 z0
� � ��� �� � � � � �� � � � � � �� � � � � � � �� � � � � � � � � � � � � � � � � �� � � � � � � � � � � � � � � � �� ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� ��� � � � � ��
�� � � � � � � � � � � � � � � � � � � � � � �� � �
� ��� � � � ��� � � �
CLK
CTRL
n-1 n-2 0
z
xr
(a)
�� ��� �� � �� � � � � � � � � � � � � � � � � � � � � � � �� � � � � � � � � � �� � � � � � � �� � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� �� � � � � � � ��
�� � � � � � � � � � � � � � � �� � � � � � � � � �
CLK
CTRL2
n-1
xn-1
n-2
xn-2
0
x0
z(b)
� � ��� �� � � � � � � � � � � � � � �� � � � � � � � � � � � � � � � � � � � � �� � �� � � � � � � � �� � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� ��� � �� � ��� �� � � � � � � � � � � � � � � � � �� � � � � � � � � �
CLKCTRL
n-1
zn-1
n-2
zn-2
0
z0
xr
(c)
� � ��� �� � � � � � � � � � � � � � �� � � � � � � � � � � �� � � � � � � �� � �� � � � � � �� � �� � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � �� � � �� � � �� � � �� � � � � � � �
CLK
CTRL2
n-1
xn-1
n-2
xn-2
0
x0
z
CLK
CTRL
n-1 n-2 0
z
xr
CLKCTRL
n-1
zn-1
n-2
zn-2
0
z0
xr
(a)
(b)
(c)
� � ��� �� � �� � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � �� � � � � � � �� � � � � � � � � � �� � �� � � � � � � � �� � � � � � � � � � �
�� � � � � � �� � �� � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� � �� � � �� � � � � � � � � � �
� �� � � � � � � � � � � � � � � � �� �� � � �
CLK
CTRL2
n-1
xn-1
n-2
xn-2
0
x0
System A
CLK
CTRL
n-1
zn-1
n-2
zn-2
0
z0
System B
xr
z
� � �� �� � �� � �� � � � � � � � � � � � � � � � � �� � � � � � � � � � � � � � � � �� � � � � � �
� � � � �� � � � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �
CLK
CTRL2
31
x31
30
x30
0
x0
FA
DQ
Q’
CLK
2
31
y31
30
y30
0
y0
CLK31
z31
30
z30
0
z0
carry-in
carry-out sum
Operand X
Operand Y
Result Z
ClockCycle Action
1 Load, clear carry FF
2-33 Add and shift
CTRL
CLR
� � �� �� � �� � � � � � �� � � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� � �� � � �� � � � � � �� � � �� �� � � � � � � �� � �
� ��� � � � � � � � � � �
� � � � � � � � � � � ��� � ��� � � � � � � � � �
� � � � � � � � � � � �� � � � � �� �� �� � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � �� �� � � � �� �� � � � � � �� � � � � � � � � � � � � �� � �
� � ��� � � � � � ��� �
� � ��� � � � � � � � ��� � �� � � � � � � � �
� � � � � � ��� � � ��� �
x(t) x(t-8)
z(t)
CLK
8-bit SHIFT REGISTERCTRL
� � �� �� � � � � � � � � � � � � �� � � � � � � � �� � � � � �� � �� � � ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � �� �� � � � �� �� � � � � � �� � � � � � � � � � � � � �� � �
� ��� � � !!
" !!#� $% � ��� � � � � � � � � � � �� � � ��� � � �
� �� �� � $ �
8-BIT SHIFT REGISTER
x
z
CTRL
CLK
� � �� �� � � � � � � � � � � � � �� � � � � � � � �� � � � � �� � �� � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � � �� � � � � � � � � � �
8-BIT SHIFT REGISTER
07
8-BIT SHIFT REGISTER
07
8-BIT SHIFT REGISTER
07
8-BIT SHIFT REGISTER
07
CTRL
CLK
serial-in (right shift)
serial-in (left shift)
serial-out(left shift)
serial-out(right shift)
� � ��� �� � � � � � � � �� � � � �� �� � � � � �� � � � �� � � � � � � �� � � � � � � �� � � � � � � �� �� � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � �
� � � � � � � � � � �� � � � � � � � � � � � � � ��� � � �
0/01/0
1/11/0
0/0
2/21/0
0/0
p-1/p-1
1/1
0/0x/TC = 0/0
s/z(state/output)
(input/terminal count)
� � ��� �� � � � � � � �� � � � � � �� � �� � � �� �� � � � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � �� � � � � � � � �� � � � � � � � � � � � � � � �
� � � � � � ��� � � � � � �� � � ��� � � � � � � � �
�� � ��� � ��� � � � � � � ��� � �� � � � � � �
� � � � � � �� � � � � � �� � � � �� � � � � � � � � � �
� ��� � � � � � � ��� � � � � � � � �
� ��� � � � ��� �
�� ��� � � !!
" !!#� � � � ��� � � � � � � � � � � � � � �
� �� �� � $ �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � � � � � �
� � � � � � � � � � � � �
� � � � � � �� � � � � � � � � � � � � � � � � � � � �� � � � � � � �� � � ��
* * * * * * * * * * � � * * * * * * * * * * � * * * *
� * * � * * * � * � * * * * � * * * * * * � * * * * �
� * � * * * � * * � * � * � � * * * * * � * * * * � �
� * � � * * � � * � � * * � * * * * * � * * * * � � �
� � * * * � * * * � � � � � * * * * � * * * * � � � �
� � * � * � * � � * * * � � � * * � * * * * * � � � *
� � � * * � � * � * * � � * � * � * * * * * * � � * *
� � � � * � � � � * � * � * * � * * * * * * * � * * *
� * * * � * � �
� * * � � � * *
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � � � � � � �� � � � � � � � �
(a)
State = 2
LOAD
xl3
z3
2
z2
0
z0
1
z1
0 0 0 1
CLK
(COUNT)
x
0 1 0 0
(b)
State = 2
LOAD
xl3
z3
2
z2
0
z0
1
z1
0 0 0 0
CLK
(COUNT)
x
0 0 1 1
� � �� �� � � � � � � � � �� �� � � � � � � � � � � � � � � � � � �� � � � � � �� � � � � � � � � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � �� � � � � � � � � � � �� � � � � � � � �
� � � �� � � �� � � � � � � ��� ��� � � � � ��� � � � � �� � �
� � � �� �� � � � � � � ��� � � � � � � � � � �� � � � � ��� ��� � � � � � � � � � � � � � � � � � � � � � � �� � � � � �
�� ��� � � � � � � � � � � � � �
�� � ��� � �
� � � � � � �� � � � �� � �� � � � �� � � � � � � � � � �
� ��� � � � � !!!!!!!!!!
" !!!!!!!!!!#� $% � � � � �
� $% �� � �
� � ��� � � � ��� � � � � $% � � � � � &' ( �� � �
� ��� � �� �� � $ �
�� � !!
" !!#� $% � ��� � � � � &' ( � � � � �
� �� �� � $ �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � � � � �
MODULO-16 COUNTER CLK
S3 S2 S1 S0
Outputs
I3 I2 I1 I0
Inputs
TC
Terminalcount
LD
Load inputs
CLR
Clear
CNTCount enable
� � ��� �� � � � � � � � �� �� � �� � � � � � � � � � � � � � � � � � � �� � � � � �� � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � � � � �� � � � � � �
� � � � �
�� � !!
" !!#� $% � � � � � � � &' ( � � � � �
� �� �� � $ �
� � �
�� � ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � � � � �� � � � � � � ) �� � � +
01/0
11/0
0/0
1/1
0/0
0/0
(a)
(b)
k-1
0/0
k
0/0
141/0
0/0
15
0/0
MODULO-16 COUNTER CLK
S3 S2 S1 S0
I3 I2 I1 I0
TC
LD
CLR
CNT
0 0 0 0
x
s0s1
s3
clear
CLK
State 9 10 11 0 1
LD(TC)
� � ��� �� � �� � � � � � �� � � � � � �� � � � � �� �� � � � � � � � � � � � � � � � � � � � � � � �� �� � �� � � � � � � � � � �� � � � � �
� � � � � � � ��� � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �
� � �� �� � � � � � �� � � � � � � �
� � � � �
�� � !!
" !!#� $% � � � � � &' ( � � � � �
� �� �� � $ �
� � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �
(a)
MODULO-16 COUNTER CLK
S3 S2 S1 S0
I3 I2 I1 I0 LD
CLR
CNT
0 0 0 1
x
s2s3
clear
TC
(b)
a1/0
0/0
a+11/0
0/01/1
b
0/0
1/0
0
0/0
1/014
0/0
1/015
0/0
b+1
0/0
�� ��� �� � �� � � � � � � � � � � � � �� � �� �� � � � � � � � � � � � � � � � � � � � �� � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � � � � � � � � � � � � �� � � � � � �
� � � � �
�� � !!
" !!#� $% �� � �
� �� �� � $ �
� � � � � �
� � ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �
16-k1/0
0/0
141/0
0/01/1
15
0/0
0
0/0
1/0
(a)
MODULO-16 COUNTER CLK
S3 S2 S1 S0
I3 I2 I1 I0
z
LD
CLR
CNT
0 1 1 1
x
clear
TC
(b)
13 14 15 7
CLK
State 13 14 15 7 8
z(TC)
� � ��� �� � � � � � � � � �� � � � � � �� � �� � �� �� � � � � �� � � � � � � � � � � � � � � � �� �� � � � � �� � � � � � � � � � � � � �� � �
� � � � � � � � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� � �� � � � � � � � �
� � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � �
� � � � � �
� � � � � � � � � � � �� � � � � � � � � � � �
� � � � � � � � � � � � � � �� � � �
� � � � � � � � � �� � � � � � � � � � � � � � � � � � � � � �
� �� � � � � � � �� � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �
FREE SPACE
<
MAX NUMBEROF SPACES
ENTRANCESENSOR
EXITSENSOR
UP
DOWN
COUNTER
COMPARATOR
LOT FULL
>
Sequence of actions:
0: CLEAR ALL REGISTERS1: INPUT A2: INPUT B3: COMPUTE4: COMPUTE5: OUTPUT C
CLEAR
INPUT A
INPUT B
COMPUTE
OUTPUT C
mod
ulo-
6C
OU
NT
ER
BIN
AR
YD
EC
OD
ER
01
3
45
2
(a)
(b)
CLK
CLK
� � ��� �� � �� � � � � �� � � � � � �� � � � � � � � � � � � � � � � �� � �� � � �� � � � � � � � � � ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� � �� � � � � � � � � ) �� � � +
S
R
Q
Q’
S
R
Q
Q’
S
R
Q
Q’
0
1
2
3
4
5
6
7
Mod
ulo-
8B
inar
y C
ount
er
BIN
AR
Y D
EC
OD
ER
CLK
TS0
TS1
TS2
S0
S1
S2
State0 1 2 3 4 5 6 7 07
TS1
TS2
TS0
(a)
Mod
ulo-
4B
inar
y C
ount
er S0
S1
CLK
CLK0
CLK2
CLK4
CLK0
CLK2
CLK4
CLK
(b)
� � ��� �� � � � � � �� � �� � � � � � � � �� � �� � � � � � � � � �� � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � �� � � � � � � � � � �� � ������� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � �� � � � � � � �� � �
�� � � �� � � ��� � � � � � � ��� � � � � � � � �
� � � � � � � � � ��� � � � � � � � �� � � � �� � � � � ��� � � � �� � � ��� � � � � � � � � &' ( � ��� � � � �� � ��� �
CNT
LD
CLK
CombinationalNetwork for
Parallel Inputs
CombinationalNetwork forLD(Load)
CombinationalNetwork forCNT(Count)
OutputCombinational
Network
n
n
z
Ix
Modulo- 2Counter
n
s
�� ��� �� � �� � � � � � � � � � � � � � � �� �� � � � � � � � � � � � � � � � � � � � � � � � � �� � � � � � � � � � � � � � � � � �� ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � �� � � � � � � � � � � ) �� � � +
� � � � !!
" !!#� � � � � � � � � � � � � � � � � � � � � � � � � � � �
� �� �� � $ �
�� � !!!!!!
" !!!!!!#� � � � � � � � � �� � ��� � � � �
� ��� � � � �� � � ��� � � � � � � � � � � � � � �
� �� �� � $ �
� � !!
" !!#� ��� � � � $% �� � �
� �� �� � $ �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � �� � � � �
S0
S1
S2
S3 S4
S5
S6
a’/0
b/0
b’/0
a/0
c/0
c’/0
b/0b’/1
-/0 -/0
-/0
�� ��� �� � �� � � � � � � � � � � �� � �� � �� � �� � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � �� �� � � � � ) �� � � +
� � � � � � � � � � � � � � �� � �
�� � � � � �
�� � � � � � � � !!!!!!
" !!!!!!#�� � � � � $% � �
� � � �
�� � � � � $% � � � � � ��
�� � � � � $% � � ��
� � � � � � � � � � � � � � � � � � � �� � � � � � � � � �
� �
� �
� � � �
� � �
� � � � � �� � � ��
� � � �
� � � � ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �
Modulo- 16CounterCNT
LD
CK
Q3
Q2
Q1
Q0
I3
I2
I1
I0
0 0
Q2
Q1
Q0
0
1
2
3
4
5
6
72 1 0
MUXb
c’
a
1
1
1
0
d.c.
Q1
Q0
b’z
Q2
Q’1
Q0
b’
�� ��� �� � � � � � �� � � � � � � � � � �� � � � � � � �� � �� � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � � � � � � � �
� � � � � � � � � � � � � �
�� � !!
" !!#� $% � � � � � � � &' ( �� � � � � �
� �� �� � $ �
� � � � � � � � � � � � � �
� � � � � !!!!!!
" !!!!!!#� $% � ��� � � � � � � � &' ( � � � � �
� � � � � � � � � � �
� �� �� � $ �
� � � � � ��� � � � � � � � � � � � � � � �� � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � � � � � � � ) �� � � +
Q
I
CNT
LDk-1
Q
I
CNT
LDk-2
Q
I
CNT
LD0
TC TCTC x
CLKLOAD
� � ��� �� � � � � � � � � � � � � �� � � � � � �� � � � �� � � �� � � � � ��� � � � � � � �
� � � � � � �� � � � �� � � � � �
� �� ��� � �� � � � � � � � � � � � � � � �
� � � � � � � � � �� � � � � � � � � � � � � � �� �
�� �� � � �� � � � � � � � � � � � � ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � �� ��� � � � �
� � � � � � � � � � ) �� �� � �� � � � � � �� � � � � � � � � � � � � � ��
�� � � � � � � � � � �� �� � � �� � � � � �� � � +
� � � � � � � �
� � � � � � � � � �
� � �� � � � � � ��
� � � � � � � � � � � � � � � � � � � � � )� � � � � � � +
� � � � � � � � � � � � � � � � � � ) � � � � � � +
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � �� � � � � � � � �
� � � � � � � � � � ) �� � � � � � �� � � �� � � +
� � � � � � � !!
" !!#� � ��� � � � � � � � � $% � � � � � &' ( � � � � �
� ��� � �� �� � $ �
� �� � �� � � � � � � � � � � � � � � � � ��
�� � !!
" !!#� $% � � ��� � � � � � � &' ( �� � � � � �
� �� �� � $ �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � �� � � � � � � � � � � � � � �
Q
ICNTLD
k-1
Q
ICNTLD
k-2TC
CLK LOAD
Q
ICNTLD
1TC xQ
ICNTLD
0TCCEF CEF CEF CEF 1
"1"
�� ��� �� � �� � � � � � � � � � � � � � � � �� � � � � � � � � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � �� � � � �� � � � � �
� � � ��� � �� � � � � � � � � � � � � � � �
� � � � � � � � � � � � � � � � � � � � �
� � � � �� � � � � � � � � �� � � � �� � � � � � � � � �� � � �� �� � �� � � �� � �
� � �� � � � � � ��
� � � � � � �� � � � � � ��
� � � � � � � � � � � � � � � �
� � � � � � � � � �
� � � � � �� � � �� ��� � � � � � � � � � � � � � � � � � � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �
p-2 p-1 0 1 2 p-2 p-1 0 1 2
p-2 p-1 0
Time available to propagate TCr r+1
Q (0)
Q (1)
Q(k-1)
TC (0)
TC (1)
tsupt
= CEF
p-2 p-1 0 1Q (0)
Time available to propagate TC
r r+1
Q(k-1)
TC (0)
tsu
pt
CNT (k-1)
p-1 0Q (1)
p-1 0
Q (k-2)
(a)
(b)
CNT (k-1)
� � �� �� � � � � � � � � � � � � � � � � � � � � �� � � � � � �� � � � � �� � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� �� � � � � � � � � � � �
� � � � � � � * � �� � � � �� � � � � � � � � � � �
� � � � � � � � � � � � � � � � � � � � � � � � �� � � � � � � � � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� �� � � � � � � � � � ) � � � � � + � � � � �
Modulo-7 COUNTER
CNT
3
Modulo-8COUNTER
CNT
4
Modulo-9COUNTER
CNT
4
Modulo-(7x8x9)COUNTER
CLK
x
�� ��� �� � �� � � � � �� � � � � � � � � � � � � � � � � �� � �� �� � � � �� �� � � � � � � � � ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � � � � �� �� � � �
� �� � �� � � � � � � � � � �� � � � � �� � � �� � � �� �� � � � � � � �� � � � � � � � � �� � � � � � � �� �
� � � � ��� � � � �� �� � � � � � � � � � � � � �� � � �
� � � � �� � � � � � � �� � � � � � � � � � � �� � �
� � � � � � � � � � � � �� � � � � � � � � �� � � � � �� � ��
� � � � � � � � � � � � � �� � � � � � � � �� � � �� � �
� � � � � � � � � � � � � �
�� ��� � � !!
" !!#� $% � � � � � � � � � &' ( ��� �� � �
� �� �� � $ �
� � � � � � � � �� �� � �� � ��� � � � � � �� �� ��� �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �
MODULO - k COUNTER
PATTERNRECOGNIZER
INITIALIZE
CLK
checkTC
p
z(t)
x(t)
(a)
� � ��� �� � � � � � �� � � � � � � � � � � �� � � � � � � �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � �� ��� � � � �� � � �� � � � �
� * � � � � � � � � * � �
� � � � � � * � � � � � �
�� * * � * * � * * � * * �
� * * * � * * * * � * * �
� * * * * * * * * � * * �
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (
� �� � � � �� � � � �
� �� � � � � � � � � � � � � �� � � � � � � � � � � � � � � � � �� �� � �� � � � � � � � �� � �
MODULO - k COUNTER
PATTERNRECOGNIZER
INITIALIZE
CLK
checkTC
p
Countof instances of P
x(t)
MODULO - NCOUNTER
z(t)
(b)
� � ��� �� � � � � � �� � � � � � � � � � � � � � � � � � � ��
����� �� �!� � �� "! #! �$% & '( �)* ( + +-, &� $ � �$ � � &) .�) �� ! $ % /� ��% ) (