sat algorithms in eda applications
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SAT Algorithms in EDA Applications. Mukul R. Prasad Dept. of Electrical Engineering & Computer Sciences University of California-Berkeley. EE219B Seminar : 3 May 2000. Outline. The Propositional Satisfiability (SAT) problem SAT Applications in EDA Two classical approaches for SAT - PowerPoint PPT PresentationTRANSCRIPT
SAT Algorithms in EDA Applications
SAT Algorithms in EDA Applications
Mukul R. Prasad
Dept. of Electrical Engineering & Computer Sciences
University of California-Berkeley
EE219B Seminar : 3 May 2000EE219B Seminar : 3 May 2000EE219B Seminar : 3 May 2000EE219B Seminar : 3 May 2000
Outline Outline
The Propositional Satisfiability (SAT) problem
SAT Applications in EDA
Two classical approaches for SAT
Recent Advances
Solving SAT on Boolean networks
Current research & Future directions
Outline Outline
The Propositional Satisfiability (SAT) problem
SAT Applications in EDA
Two classical approaches for SAT
Recent Advances
Solving SAT on Boolean networks
Current research & Future directions
The Propositional Satisfiability (SAT) problem
The Propositional Satisfiability (SAT) problem
Given a formula, f :
))()(( cbacacba
C1 C2 C3
a=b=c=1
(a,b,c)
(C1,C2,C3) Comprised of a conjunction of clauses
Defined over a set of variables, V
Each clause is a disjunction of literals of the variables V
Example :Example :
Does there exist an assignment of Boolean values to the variables, V which sets at least one literal in each
clause to ‘1’ ?
Outline Outline
The Propositional Satisfiability (SAT) problem
SAT Applications in EDA
Two classical approaches for SAT
Recent Advances
Solving SAT on Boolean networks
Current research & Future directions
SAT Applications in EDASAT Applications in EDA
Combinational ATPG (stuck-at, bridging, delay faults)
Circuit Delay Computation
FPGA Routing
Logic Synthesis (viz. redundancy removal)
Combinational Equivalence checking
Processor Verification
Bounded Model Checking
Functional vector generation
Crosstalk Noise Analysis
…..
Outline Outline
The Propositional Satisfiability (SAT) problem
SAT Applications in EDA
Two classical approaches for SAT Davis-Putnam, 1960 (Resolution) Davis-Logemann-Loveland, 1962 ( Backtracking)
Recent Advances
Solving SAT on Boolean networks
Current research & Future directions
Simple Backtracking Algorithm for SATSimple Backtracking Algorithm for SAT
Is_SAT(f, A)
{
if Check_SAT(f, A) return SAT
if Check_UNSAT(f,A) return UNSAT
v = Next_Variable(f, A)
if Is_SAT(f, (A,v=0)) return SAT
if Is_SAT(f, (A,v=1)) return SAT
return UNSAT
}
f,A
v
f, (A,v=0) f, (A,v=1)
Given : CNF formula f(v1,v2,..,vk) , and a total order on the variables v1,v2,..,vk
Backtracking Contd...Backtracking Contd...
Unit Clause Rule : Assign to true the literal in any single literal clauses. Iterated application of this is called Boolean Constraint
Propagation (BCP)
))()()()()(( edcedeccbacbcaa
))()()(( edcedeccbc
)( ede
))(( baca
Pure Literal Rule : Set any unate variables in the aaformula to their appropriate polarity
Resolution (Davis-Putnam 1960)Resolution (Davis-Putnam 1960)
))(( baca
)( bc
Resolve out variableResolve out variable Resolve out variableResolve out variable a
)( eda
)( edb
Resolution Contd...Resolution Contd...
Given : CNF formula f(v1,v2,..,vk) , and a total order on the variables v1,v2,..,vk
For each variable ‘v’ in sequence of the total order :
Resolve out variable ‘v’ and add all generated resolvents to a formula
Remove all clauses with variable ‘v’
Iterate, till :
All clauses are resolved out => SAT
Conflicting pair of unit clauses are created => UNSAT
Branching Vs ResolutionBranching Vs Resolution
Branching
Linear space (memory) requirements.
Depth-First search of the solution space.
Simplistic though highly redundant.
Resolution
Worst case exponential space (memory) req.
Breadth-First search of the solution space.
Simplistic though highly redundant.
Outline Outline
The Propositional Satisfiability (SAT) problem
SAT Applications in EDA
Two classical approaches for SAT
Recent Advances Non-local implications (SOCRATES, TEGUS) The GRASP algorithm Recursive Learning
Solving SAT on Boolean networks
Current research & Future directions
Recent AdvancesRecent Advances
Non-local implications (SOCRATES,TEGUS) Usually performed as a pre-processing step long implication chains common in SAT on circuits Avoid repeated work in BCP
cacbba ),( )( ca
The GRASP algorithm (Silva & Sakallah, 1996) The GRASP algorithm (Silva & Sakallah, 1996)
Distinguishing feature :Distinguishing feature : Conflict analysisConflict analysis
Main Features of GRASPMain Features of GRASP
SATSAT
XXk-1k-1XXk-1k-1
xxkkxxkk
xx22xx22
xx11xx11
xxjjxxjj
Failure-driven assertionsFailure-driven assertions
Non-chronological backtrackingNon-chronological backtracking
Conflict-based equivalenceConflict-based equivalence
11
22
33
Conflict Analysis: An ExampleConflict Analysis: An Example
)( 21 xx
)( 9312 xxx
)( 4323 xxx
)( 10544 xxx
)( 11645 xxx )( 656 xx
)( 818 xx )( 12717 xxx
)( 13879 xxx
}6@1{ 1 xDecision Assignment:Decision Assignment:
}2@1,2@1,3@0,3@0,1@0{ 131211109 xxxxx
Current Assignment:Current Assignment:
Example Contd: Implication GraphExample Contd: Implication Graph
xx22= 1@6= 1@6
xx1111= 0@3= 0@3
xx66= 1@6= 1@6
xx55= 1@6= 1@6
xx11= 1@6= 1@6
xx99= 0@1= 0@1
xx44= 1@6= 1@6
xx33= 1@6= 1@6
xx1010= 0@3= 0@3
33
33
11
22
22
44
44
55
55
66
66
)(( 111091 xxxxc )( 4323 xxx
Example Contd….Example Contd….
xx77= 1@6= 1@6
xx1313= 1@2= 1@2
xx1212= 1@2= 1@2
xx88= 1@6= 1@6
`̀`̀ 99
99
99
77
77
88
xx11= 0@6= 0@6
xx99= 0@1= 0@1
xx1010= 0@3= 0@3
xx1111= 0@3= 0@3
x1
55
33
66
Decision Decision LevelLevel
Recursive LearningRecursive Learning
Proposed by Kunz & Pradhan as a general technique for Boolean Reasoning on logic circuits.
Basic idea : Extract common conclusions by examining all possible scenarios of achieving a given objective, upto a restricted degree (recursion depth).
common conclusionscommon conclusionsall possible scenariosall possible scenarios
restricted degreerestricted degree
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Common Common Inference !!Inference !!
Recursive Learning on CNF FormulasRecursive Learning on CNF Formulas
)(1 wxu )(2 yx )(3 zyw
}0,1{ uzAssignments:Assignments:
)1()0)(1( xuz
)( xuz
0,1|3 uz
1w 1y
1x1x
Outline Outline
The Propositional Satisfiability (SAT) problem
SAT Applications in EDA
Two classical approaches for SAT
Recent Advances
Solving SAT on Boolean networks
Current research & Future directions
Solving SAT on Boolean networksSolving SAT on Boolean networks
Observation: Topological circuit information is often crucial to the efficient solution of SAT problems posed on logic circuits. Natural ordering of variables Grouping of variables to reason about Natural partitioning of the problem
Proposed Solutions : Solve SAT directly on the network Augment a conventional SAT solver with a circuit
layer (Silva et. al.: CGRASP) Extended Implication graph (Tafertshofer et. al.)
Current Research EffortsCurrent Research Efforts
Incremental SAT (Sakallah et. al.)
Pre-processing of SAT formulas (Silva et. al.)
Dedicated Reconfigurable hardware architecutes
(Abramovici et. al., Malik et. al.)
Randomized SAT algorithms for EDA applications
(Selman & Kautz, Singhal & Burch)
Bounded /Directed Resolution
Suggested ReadingSuggested Reading
J. Marques-Silva and K. A. Sakallah, “GRASP: A Search Algorithm for Propositional Satisfiability,” in IEEE Transactions on Computers, vol. 48, no. 5. pp 506-51, May 1999
J. Marques-Silva and K. A. Sakallah, “Boolean Satisfiability in Electronic Design Automation,” to appear at DAC 2000.
J. Gu, P. W. Purdom, J. Franco, B. W. Wah, “Algorithms for the Satisfiability (SAT) Problem: A Survey,” DIMACS Series in Discrete Mathematics and Computer Science, vol. 35, pp. 19-151, 1997.