structured electronic design
TRANSCRIPT
1(c) 2020 A.J.M. Montagne
Structured Electronic Design
Quiz biasing techniques
Anton J.M. Montagne
2(c) 2020 A.J.M. Montagne
Biasing Techniques
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Biasing Techniques
Brute force
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Biasing Techniques
Brute forceFix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
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Biasing Techniques
Brute force
Compensation
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
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Biasing Techniques
Brute force
CompensationReproduce the error at some location in a system
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
7(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
CompensationReproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
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Biasing Techniques
Brute force
Compensation
Negative feedback
Reproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
9(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
Compensation
Negative feedbackMeasure the response
Reproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
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Biasing Techniques
Brute force
Compensation
Negative feedbackMeasure the responseCompare it with the desired value
Reproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
11(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
Compensation
Negative feedbackMeasure the responseCompare it with the desired valueNullify the difference
Reproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
12(c) 2020 A.J.M. Montagne
Biasing Techniques
Brute force
Compensation
Negative feedbackMeasure the responseCompare it with the desired valueNullify the difference
Reproduce the error at some location in a systemSubtract it from the signal at that location
Fix the relation between a branch voltage and currentsimply through insertion of a two-terminal elementwith the desired v-i relation in that branch
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Brute-force biasing
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Brute-force biasing
BSc course structured electronic design:
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Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
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Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
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Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
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Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
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Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
20(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
21(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the gate voltage:
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Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
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Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the drain voltagefor a given drain current:
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
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Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the drain voltagefor a given drain current:
Increase of power dissipation
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
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Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the drain voltagefor a given drain current:
AC coupling: insertion of a voltage level shiftin series with the signal path through insertionof a capacitor:
Increase of power dissipation
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
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Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the drain voltagefor a given drain current:
AC coupling: insertion of a voltage level shiftin series with the signal path through insertionof a capacitor:
Deterioration of start-up behaviorand overdrive recovery
Increase of power dissipation
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
27(c) 2020 A.J.M. Montagne
Brute-force biasing
BSc course structured electronic design:
Insertion of impedances in series or in parallelwith the signal path should be avoided:
Deterioration of the noise performance
Increase of power dissipation
Increase of energy storage
Deterioration of the overdrive recovery
Brute-force fixing of the drain voltagefor a given drain current:
AC coupling: insertion of a voltage level shiftin series with the signal path through insertionof a capacitor:
Deterioration of start-up behaviorand overdrive recovery
Increase of power dissipation
Brute-force fixing of the gate voltage:
Deterioration of the noise performance
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Model-based biasing
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Model-based biasing
Application of Compensation
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Model-based biasing
Application of Compensation
Requires reproduction of the error
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Model-based biasing
Application of Compensation
Requires reproduction of the errorLimited improvement: imperfect reproduction (matching error):
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Model-based biasing
Application of Compensation
Requires reproduction of the errorLimited improvement: imperfect reproduction (matching error):
Needs to change with temperature to ensurea temperature-independent drain current
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Model-based biasing
Application of Compensation
Requires reproduction of the errorLimited improvement: imperfect reproduction (matching error):
Needs to change with temperature to ensurea temperature-independent drain current
Generates the temperature-dependent gate-source voltage
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Model-based biasing
Application of Compensation
Requires reproduction of the errorLimited improvement: imperfect reproduction (matching error):
Needs to change with temperature to ensurea temperature-independent drain current
Generates the temperature-dependent gate-source voltage
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Feedback biasing
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Feedback biasing
Automatic reduction of biasing errors
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Feedback biasing
Automatic reduction of biasing errors
Only possible if frequency components of biasing errors and of signal do not overlap
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Feedback biasing
Automatic reduction of biasing errors
Only possible if frequency components of biasing errors and of signal do not overlap
Requires a loop filter: DC transfer will (ideally) be zero
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Feedback biasing
Automatic reduction of biasing errors
Only possible if frequency components of biasing errors and of signal do not overlap
+
-
+
-
+
-
Requires a loop filter: DC transfer will (ideally) be zero
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Feedback biasing
Automatic reduction of biasing errors
Only possible if frequency components of biasing errors and of signal do not overlap
+
-
+
-
+
-
Requires a loop filter: DC transfer will (ideally) be zero
+
-
+
-
+
-
+
-
+
-
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Feedback biasing
Automatic reduction of biasing errors
Only possible if frequency components of biasing errors and of signal do not overlap
+
-
+
-
+
-
Requires a loop filter: DC transfer will (ideally) be zero
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
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Electronic self inductance
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Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
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Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
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Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-
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Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-Output impedance?
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Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-
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Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-Output impedance?
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Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-Output impedance?
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Electronic self inductance
At low frequencies: low impedance in parallel with the signal path
At high frequencies: high impedance in parallel with the signal path
+
-
|Z|
|f|
(log)
(log)
inductive
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Electronic self inductance
Electronic self inductance
|Z|
|f|
(log)
(log)
inductive
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Some examples
4. negative feedback biasing
1. compensation
2. model-based biasing
5. electronic self inductance
3. brute force technique
Applied techniques
A B
C D E