technique to determine the optimised harmonic switching angles of a cascaded multilevel inverter for...

For Peer Review Only

Technique to Determine the Optimised Harmonic Switching Angles of a Cascaded Multilevel Inverter for Minimum

Harmonic Distortion

Journal: IETE Journal of Research

Manuscript ID: TIJR-2015-1247

Manuscript Type: Original Article

Date Submitted by the Author: 24-Aug-2015

Complete List of Authors: Sharma, Angshuman; Tezpur University, Electronics & Communication Engineering Dept. Bardalai, Aroop; Assam Engineering College, Electrical Engineering

Keywords: Harmonic distortion , Inverters, Multilevel systems, Switching frequency

Abstract:

Multilevel inverters have received considerable attention from industries and researchers for its high power and voltage applications. Various switching techniques have been suggested for improving the quality and

performance of inverters. One of the conventional techniques for implementing the switching algorithm in these inverters is Optimised Harmonic Stepped Waveform (OHSW). However, this technique involves the major problem of solving nonlinear and complex equations, which indicates a possibility of multiple solutions. This paper describes a novel technique that uses the simple arithmetic sequence of natural numbers to determine the optimised switching angles of a single phase cascaded multilevel inverter of any number of levels and fed by equal dc sources. The basic objective was to avoid the laborious process of solving the non-linear equations using complex switching algorithm for finding the optimal solution of the switching angles. This technique is implemented to calculate the optimised switching angles of a 9-level cascaded inverter that reduces

the total harmonic distortion to below 9%.

URL: https://mc.manuscriptcentral.com/tijr E-mail: [email protected]

IETE Journal of Research


Figure 1. Odd quarter wave symmetric 9-level cascaded inverter waveform.

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Figure 2. Optimised harmonic stepped voltage waveform of a nine-level inverter. 153x79mm (96 x 96 DPI)

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Figure 3. Column chart showing the amplitudes of the harmonic components of 9-level inverter. 174x120mm (96 x 96 DPI)

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Figure 4. Column chart showing the comparison of the THD between the three multilevel inverters. 80x60mm (96 x 96 DPI)

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1

Technique to Determine the Optimised Harmonic

Switching Angles of a Cascaded Multilevel Inverter

for Minimum Harmonic Distortion

Angshuman Sharma and AroopBardalai

Angshuman Sharma was with Electrical Engineering Department, Assam Engineering College, Guwahati 781013, Assam, India. He is now with the

Department of Electronics & Communication Engineering, Tezpur University, Tezpur - 784028, Assam, India (corresponding author, phone: 03712-273199; +91-9707475263, fax: 03712-267005; e-mail: [email protected]).

AroopBardalai is with the Electrical Engineering Department, Assam Engineering College, Guwahati 781013, Assam, India. (e-mail:

[email protected]).

ABSTRACT

Multilevel inverters have received considerable attention from industries and researchers for its high power and voltage

applications. Various switching techniques have been suggested for improving the quality and performance of inverters. One

of the conventional techniques for implementing the switching algorithm in these inverters is Optimised Harmonic Stepped

Waveform (OHSW). However, this technique involves the major problem of solving nonlinear and complex equations,

which indicates a possibility of multiple solutions. This paper describes a novel technique that uses the simple arithmetic

sequence of natural numbers to determine the optimised switching angles of a single phase cascaded multilevel inverter of

any number of levels and fed by equal dc sources. The basic objective was to avoid the laborious process of solving the non-

linear equations using complex switching algorithm for finding the optimal solution of the switching angles. This technique

is implemented to calculate the optimised switching angles of a 9-level cascaded inverter that reduces the total harmonic

distortion to below 9%.

Keywords:

Arithmetic sequence; multilevel inverter; natural number, optimised harmonic stepped waveform; switching angles; total harmonic

distortion.

1. INTRODUCTION

The concept of multilevel inverters has revolutionised

inverter technology. A multilevel voltage source inverter

divides the main dc supply voltage into several smaller dc

sources which are used to synthesise an ac voltage into a

staircase or stepped approximation of the desired sinusoidal

waveform [1]. Among the significant advantages of

multilevel configuration is the harmonic reduction in the

output voltage waveform without increasing switching

frequency or decreasing the inverter power output [2-4]. The

so-called multilevel starts from three levels. The multilevel

inverter topology can overcome many limitations of the

standard bipolar inverter. Output voltage and power increase

with number of levels. Increasing the output voltage does

not require an increase in the voltage rating of individual

force commutated devices. If the multilevel inverter output

increases to infinite level, the harmonic content of the output

voltage is reduced to zero [5]. But for increasing voltage

levels, the number of switches also will increase in number.

Hence the voltage stresses and switching losses will also

increase [6]. So the number of achievable voltage levels is

limited by voltage unbalance problem, voltage clamping

requirement, circuit layout, and packaging constraints [7].

The multilevel inverter can yield operating characteristics

such as high voltage, high power level and high efficiency

without the use of transformers [2,8]. It is recently applied

in static synchronous compensators, active filters, reactive

power compensation applications [9], photovoltaic power

conversion, uninterruptible power supplies and magnetic

resonance imaging. Furthermore, one of the growing

applications for multilevel inverter is electric and hybrid

motor drives.

The multilevel inverters are mainly classified as Diode

Clamped [4,10], Flying Capacitor [11] and Cascaded H-

bridge multilevel inverter with separate dc sources

(SDCSs)[2,12-14].The cascaded multilevel inverter was first

proposed in 1975 [1`3]. The cascaded multilevel inverter is

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made of several H-bridge inverters, each powered by a

separate dc source which may be obtained from batteries,

fuel cells, or solar cells. It synthesises a desired voltage from

several independent DC voltage sources, such that the

synthesised voltage waveform corresponds to the sum of the

inverter outputs. Since this topology consist of series power

conversion cells, the voltage and power level may be easily

scaled. The cascaded inverter control method is easier to

implement when compared to other multilevel inverters due

to circuit layout flexibility, absence of transformer, extra

clamping diode or voltage balancing capacitor [15], and

easy adjustment of the number of output voltage levels by

adding or reducing H-bridge cells [16]. This configuration

has recently become very popular in ac power supplies and

adjustable speed drive applications [1,12,13].

An important key in designing an effective and efficient

multilevel inverter is to ensure that the total harmonic

distortion (THD) in the output voltage waveform is small

enough [17,18]. With more voltage levels, the multilevel

waveform becomes smoother with low harmonic content,

but with many levels, the design becomes more complicated

with more components and a more complicated controller

for the inverter is required [19]. Power electronics

researchers have suggested several switching strategies,

such as sinusoidal or sub-harmonic natural pulse width

modulation (SPWM) [20,21], selective harmonic-eliminated

pulse width modulation (SHE PWM) [20,22], space-vector

modulation (SVM) [23,24], optimised harmonic-stepped

waveform (OHSW) [3,10-12], and optimal minimisation of

THD (OMTHD) [25], to eliminate or minimise the harmonic

content in multilevel waveforms comprising a specific

number of levels.

The OHSW technique is very suitable for a multilevel

inverter circuit [26].In this method, the goal is to conduct

potential elimination of low order harmonics; when this goal

cannot be achieved, the highest possible harmonics

optimisation is desired [16]. The challenge associated with

such techniques is to obtain the optimised harmonic

switching angles through analytical solutions of non-linear

transcendental equations that contain trigonometric terms

which naturally exhibit multiple sets of solutions. Attention

has previously been focused on using the numerical iterative

methods and the evolutionary search algorithms for solution

of the non-linear complex equations. However, each of them

has their own advantages and disadvantages.

In this paper, the optimums witching angles for a

cascaded multilevel inverter are determined using a simple,

fast, efficient and reliable technique that does not require to

solve the complex non-linear equations at all, in order to

achieve minimum harmonic distortion of the output voltage

waveform. The method focuses on quarter wave symmetric

multilevel inverter waveform having equal step height, i.e.

fed by equal dc sources. It uses the arithmetic sequence of

natural numbers to determine the step spaces and henceforth

the switching angles of the cascaded multilevel inverter.

This technique involves simpler formulation and can be

used with multilevel inverters having any odd number of

levels. A 9-level cascaded inverter is considered in this

paper for analysis and the optimised harmonic switching

angles are calculated.

2. OPTIMISED HARMONIC STEPPED WAVEFORM TECHNIQUE (OHSW)

A general odd quarter wave symmetric 9-level cascaded

inverter waveform is represented in Figure 1. To achieve the

9-level waveform, four separate dc sources are required. V1

to V4 are dc voltage supplies from separated dc sources.

Figure 1. Odd quarter wave symmetric 9-level cascaded

inverter waveform.

Considering equal amplitude of all dc sources, i.e.,

V1=V2=V3=V4=E, the expression of the amplitude of the

fundamental and harmonic components of the waveform are

given as:

Hn() = foroddn0forevenn (1)

Hence the Fourier series of the output voltage waveform

is given as:

Vout() = (2) where

E dc voltage supply;

n odd harmonic order;

s number of dc sources; optimised harmonic switching angle, which must satisfy the condition:, !, ", # !

For determining the Fourier series of the 9-level output

voltage waveform, four switching angles,, !, ", , need to be known. Mathematically, four equations are required to

be set up to solve these switching angles. Unfortunately,

these equations are nonlinear as well as transcendental in

nature, which indicates a possibility of multiple solutions.

Moreover, the estimated solutions must be less than /2.

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Several methods have been suggested for solving these

equations which can be broadly categorised into two sets.

The first group attempts to solve these equations using the

Newton-Raphson (N-R) iterative method [27]. Iterative

methods mainly depend on an initial guess. Moreover,

divergence problems are likely to occur, especially when the

number of inverter levels is more [28]. Although the N-R

method is conveniently fast, it can only find one set of

solutions. Chiassonet. al. [29] derived analytical expressions

using the mathematical Resultant Theory to compute the

optimum switching angles with the exact range of

modulation index (M). These expressions were polynomials

of 22nd

degree which were difficult and time consuming to

derive, and for any change of levels or voltage inputs, new

expressions were required [30]. Homotopy algorithm is

another approach applied to determine one set of solutions

[31]. Overall, all methods included in the first group do not

suggest any optimum solutions for a particular M.

The second group finds solutions that deal with

eliminating the lower order harmonics completely. In this

case, all evolutionary search algorithms can be regarded as

suitable choices. These approaches are applicable for

problems that deal with any number of levels, with simple

derivation of analytical expressions. But these approaches

involve extensive computing [10,16,28,32,33] and are not as

fast as the first group of methods.

One of the major problems in electric power quality is the

harmonic contents. There are several methods of indicating

the quantity of harmonic contents. The most widely used

measure is the total harmonic distortion (THD) [3]. The

THD evaluates the extent of harmonic contents in the output

waveform [7]. THD is mathematically given by,

THD = $ %&'(&)'

%* (3) where H1is the amplitudes of the fundamental component,

whose frequency is 0 and H(n) is the amplitude of the nth

harmonic at frequency n0.

Substituting H1 and H(n) in the above equation, we have

THD = $ +*& ,-./010)* 2

'(&)' ,-./010)* (4)

Therefore, output voltage THD of the presented waveform

can be calculated. Theoretically, to get exact THD, infinite

harmonics need to be calculated. However, practically, it is

not possible. Therefore, certain number of harmonics is

calculated. It relies on how precise the THD is needed.

3. PROPOSED TECHNIQUE

The technique that has been developed for the

determination of step spaces is based on the simple

Arithmetic Sequence of Natural Numbers, which is 1, 2, 3,

4,, n. If time is considered as the reference, then for

the 1st positive quarter wave, this technique assigns 1 unit of

time for the 1st step space, 2 units of time for the 2

nd step

space, 3 units of time for the 3rd

step space and so on till the

last step space is completed at /2. Since the 9-levelwaveform of Figure 1 is considered to be

quarter-wave symmetric, so Fourier analysis of the first

quarter wave from 0 to /2 is sufficient to compute the

amplitude of the fundamental and odd harmonic components

of the complete waveform. There are five steps in the 1st

quarter wave of the waveform, which indicates that there are

4 H-bridge cells in the 9-level cascaded inverter. Following

this technique, the step spaces can be assigned as follows: 1st

step space is assigned 1 unit of time, 2nd

step space is

assigned 2 units of time, 3rd

step space is assigned 3 units of

time, 4th

step space is assigned 4 units of time, and the 5th

and final step space of the 1st quarter wave is assigned 5

units of time.

The procedure can be further described as follows. Let t1,

t2, t3, t4 are the switching instants of the four H-bridge cells

of the cascaded 9-level inverter. Initially, all the H-bridge

cells are in the OFF state and will continue to be in the OFF

state for 1 unit of time till t1 is reached. At the instant t1, the

1st H-bridge cell is switched ON. The 2

nd H-bridge cell is

switched ON after 2 units of time at the instant t2. Now both

the 1st and the 2

nd H-bridge cells are in the ON state for the

next 3 units of time till the instant t3 is reached. At the

instant t3, the 3rd

H-bridge cell is switched ON and the 1st,

2nd

and 3rd

H-bridge cells operate simultaneously for the

next 4 units of time till the instant t4 is reached. At the

instant t4, the 4th

and the last H-bridge cell is switched ON.

Now all the four H-bridge cells operate simultaneously

for the next 5 units of time when finally /2 is reached and

the first quarter wave is accomplished. Total number of units assigned for all the step spaces of the 1

st quarter wave = 1 + 2 + 3 + 4 + 5 = 15

For the waveform of Figure 1, let the frequency be 50Hz,

so that the time period of the complete wave is,

T = 1/50 second = 0.02 second.

Time for half wave = 0.01 second. Time for quarter wave = 0.005 second. Let tbe the time for each unit. Since there are total 15

units assigned in the 1st quarter wave which has a time

period of 0.005 seconds, therefore, we can write,

15t = 0.005 second

t = 5.5566 s

t = 0.000333 s

1st step space, t1 = t = 0.000333 s 2

nd step space, t2 = 2t = 0.000667 s

3rd

step space, t3= 3t = 0.000999 s 4

th step space, t4 = 4t = 0.001333 s

5th

step space, t5 = 5t = 0.001667 s Then,

t1 = 0 + t1 = 0.000333 s t2 = t1 + t2 = 0.001 s

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t3 = t2 + t3 = 0.002 s t4 = t3 + t4 = 0.003333 s Thus the 4

thH-bridge cell is switched on at instant t4 =

0.003333 s and is operated for t5 = 0.001667 s when the 1st quarter wave is completed at 0.005 s.

Since we know, angle = t = !8 9 = !5.5! 9 0.000333, ! = !5.5! 9 0.001, " = !5.5! 9 0.002, = !5.5! 9 0.003333 Thus the optimised harmonic switching angles of the four

H-bridge cells in the first quarter wave are

= 0.0333, ! = 0.1, "= 0.2, = 0.3333 in radian

or, = 6,! = 18, "= 36, = 60 in degrees These switching angles were used to generate the

optimised harmonic stepped voltage waveform of the nine-

level inverter operating at 50 Hz frequency and fed by four

equal dc sources of magnitude E each, so as to maintain

equal step height. The waveform is depicted in Figure 2,

where 1,2,3,4 and 5 indicate the 1st, 2

nd, 3

rd, 4

th and 5

th step

space respectively.

4. RESULTS AND DISCUSSION

Let the 9-level cascaded inverter, shown in Figure 2, be

fed by four identical dc sources of 100V each. The output

voltage waveform is controlled by four switching angles, !, "and. Performing Fourier analysis, the amplitude of the fundamental and odd harmonic components and the

Total Harmonic Distortion (THD) can be easily calculated.

Using the nonlinear equation system (1) and the optimised

harmonic switching angles, , !, "and, obtained in the previous section, the amplitude of the fundamental

component, H1 is calculated and is found to be 414.40 V.

The same equation system also allows us to calculate the

amplitudes of the odd harmonic components. The Column

chart of Figure 3 shows the amplitudes of the fundamental

and odd harmonic components up to the 63rd

harmonic.

Results show that the proposed technique does not eliminate

the harmonics, but minimises it satisfactorily. Further, the

amplitude of each odd harmonic component is reduced

below 4.1% of the amplitude of the fundamental component

for the 9-level inverter. By substituting the amplitudes of the

harmonic components in (4), the output voltage THD,

calculated up to63rd

harmonic, is found to be 8.99%.

This technique has also been applied to determine the

optimised harmonic switching angles of 11-level and 13-

level cascaded inverters and study their respective harmonic

distribution. Assuming identical operating conditions, it is

found that the amplitude of the fundamental component and

the THD are 514.41V and 8.14% respectively in case of 11-

level cascaded inverter and 614.20V and 7.99% respectively

in case of 13-level cascaded inverter. Studying the results

obtained for the 9-level, 11-level and 13-level cascaded

inverters, it is observed that the output voltage of the

inverters increase as the number of levels increase while

their THD decrease with higher number of levels. This can

be seen from the column chart of Figure 4 which compares

the output voltage THD of the 9-level, 11-level and 13-level

cascaded inverters.

Figure 2. Optimised harmonic stepped voltage waveform of a nine-level inverter.

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Figure 3.Column chart showing the amplitudes of the harmonic components of9-level inverter.

Figure 4.Column chart showing the comparison of the THD between

the three multilevel inverters

5. CONCLUSION

The goal of this technique was to calculate the optimised

harmonic switching angles for which the multilevel

waveform exhibits minimum harmonic distortion. The idea

was to avoid the tedious process of solving non-linear and

complex equations to find the optimised harmonic switching

angles. A fast, efficient and reliable

mathematicaltechnique,involving simpler calculations, was

presented to determine the switching angles of a cascaded

multilevel inverter without extensive derivation of analytical

expressions.The proposed technique includes the Arithmetic

Sequence of natural numbers to assignthe step spaces and

henceforth to determine the optimised harmonic switching

angles of the cascaded multilevel inverter having any odd

number of levels. The technique holds good for multilevel

inverters having quarter wave symmetric waveform and fed

by equal dc sources. As an example, it was used to solve the

switching angles of a nine-level cascaded inverter and the

output voltage THD was found to be 8.99%. Results show

that the proposed technique does not eliminate the

harmonics, but minimises it satisfactorily. Further, this

technique has also been applied to 11-level and 13-level

cascaded inverters and their output voltage THDs are found

to be 8.14% and 7.99% respectively, which indicates that

the THD decrease with higher number of levels.

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April 2008.

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(ISIE), 4-7 pp. 578-583, June 2007.

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Angshuman Sharma was born in

Assam, India in 1989. He received his

B.E. degree in Electrical Engineering

from Jorhat Engineering College

(JEC), Jorhat, Assam, India in 2012,

and his M.E. degree in Power Systems

from Assam Engineering College

(AEC), Guwahati, Assam, India in 2014. Soon thereafter, he

joined Tezpur University, Tezpur, Assam, India and is

presently working as an Assistant Professor in Electrical

Engineering in the Dept. of ECE. His current research

interests include multilevel inverters, analysis and control of

power electronics devices, application of power electronics

in power system, solid state transformers and robotics.

AroopBardalai received his B.E.

degree in Electrical Engineering from

Assam Engineering College (AEC),

Guwahati, Assam, India in 1984. After

a brief period in BRPL as an executive

trainee, he joined AEC in 1985 as a

Lecturer in Electrical Engineering

Department. Subsequently he obtained Masters degree from

Indian Institute of Science, Bangalore, India in 1988 and

was awarded PhD from Gauhati University, Guwahati,

Assam, India in 2008. He is presently working as an

Associate Professor in the Department of Electrical

Engineering, AEC. During his long academic career, apart

from offering various courses and laboratories, he has

guided numerous projects of practical importance for under

graduate and graduate students. He has also been

instrumental in developing laboratories in the Department,

steering the examination process for a long time, and

involved in hostel administration. He has been an active

member of the Institution of Engineers (India), Assam State

Centre.

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