vlsi designec1461

Hindustan University

Format No ACD-01 IssueNo:01 Revision:01

COURSE FILE - THEORY

BATCH : 2007-2011------------------------------ BRANCH : Electronics and Instrumentation YEAR / SEMESTER : 2010-2011/VII--------------------- SUBJECT : VLSI Design---------------------- SUBJECT CODE : EC1461----------------------------- STAFF INCHARGE : S.Janakiraman-----------------

DEPARTMENT OF ELECTRONICS AND INSTRUMENTATION

HINDUSTAN UNIVERSITY PADUR – 603 103

HINDUSTAN UNIVERSITY

CONTENTS OF THEORY COURSE FILE

(AS PER QSP No : P 08 Dt 2-7-2004)

1. Preface of the course file

2. Subject Handlers of yesteryears

3. College calendar

4. Course specification

5. Syllabus

6. Nominal roll

7. Class time table

8. Lesson Plan

9. Notes /teaching aids

10. Assignments

11. Self Study Topics

12. Attached academic programs

13. Result Analysis

14. Unit test /model exam question papers

15. Copy of answer Script

16. University question bank


Format No ACD-02 Issue No: 01 Revision :01

SUBJECT HANDLERS OF YESTER YEARS

DEPARTMENT OF ELECTRONICS AND INSTRUMENTATION

SUBJECT : VLSI DESIGN SUBJECT CODE : EC1461

S. No.

Year

Name of the Staff

1 2008 S.JANAKIRAMAN



4

5

Faculty In-charge HOD



COURSE SPECIFICATION

DEPARTMENT OF ELECTRONICS AND INSTRUMENTATION Subject: VLSI DESIGN Faculty Name: S.JANAKIRAMAN Subject Code: EC1461 Faculty Code: EIEF07 Year/Semester: 2010-2011/VIII AIM

To introduce the technology & concepts of VLSI.

OBJECTIVE

i. To introduce MOS theory / Manufacturing Technology.

ii. To study inverter / counter logic / stick / machine diagram / sequential circuits.

iii. To study address / memory / arithmetic circuits.

iv. To introduce FPGA architecture / principles / system design.

v. To get familiarised with VHDL programming behavioural/Structural/concurrent/ process.



Format No ACD-04 IssueNo:01 Revision:01

LESSON PLAN (THEORY / TUTORIALS) DEPARTMENT : EIE FACULTY NAME : S.JANAKIRAMAN SUBJECT & CODE : EC1461 FACULTY CODE : EIEFO7 SEMESTER : VIII CLASS / BATCH : EIE8/2007-2011 DATE FROM: 08-12-2010 TO :APRIL-2011

UNIT NO. MAIN TOPIC / SUB TOPIC TEXT/REF.

BOOKS WEEK

NO PERIOD

NO.

NO. OF HRS

ALLOTTED

CUM HRS

1. 2. 3.

BASIC MOS TRANSISTOR

Enhancement mode & Depletion mode – Fabrication (NMOS, PMOS, CMOS, BiCMOS) Technology – NMOS transistor current equation – Second order effects – MOS Transistor Model.

NMOS & CMOS INVERTER AND

GATES

NMOS & CMOS inverter –

Determination of pull up / pull down ratios –

Stick diagram –

lamda based rules –

Super buffers –

BiCMOS & steering logic.

SUB SYSTEM DESIGN & LAYOUT

Structured design of combinational circuits – Dynamic CMOS & clocking – Tally circuits – (NAND-NAND, NOR-NOR and AOI

T.B.1 TB1 T.B.2 T.B.2

W1 W2 W3 W3 W4 W5 W5

1,2 2,3 4,5 6,7 7,8 9 10,11 12,13 13,14 15,16 17,18 19,20 21,22

9 9

9

9 18

4. 5.

logic) – EXOR structure – Multiplexer structures – Barrel shifter.

DESIGN OF COMBINATIONAL ELEMENTS & REGULAR ARRAY LOGIC

NMOS PLA – Programmable Logic Devices - Finite State Machine PLA – Introduction to FPGA.

VHDL PROGRAMMING

RTL Design – Combinational logic – Types – Operators – Packages – Sequential circuit – Sub-programs – Test benches. (Examples: address, counters, flipflops, FSM, Multiplexers / Demltiplexers).

TEXT BOOKS

1. D.A.Pucknell, K.Eshraghian, ‘Basic VLSI Design’, 3rd Edition, Prentice Hall of India, New Delhi, 2003. 2. Eugene D.Fabricius, ‘Introduction to VLSI Design’, Tata McGraw Hill, 1990. 3. Douglas Perry, ‘VHDL Programming by example’, Tata McGraw Hill, 3rd Edition, 2003.

TT.B.2 T.B.2 T.B.3 T.B.3

W6 W7 W7 W8 W9 W10 W11 W12

23,24 25,26 27 28,29 30-32 33-36 37,38 39,40 41,42 43,44 45,46 47,48

9 12

27 36 48


Hindustan University Format No ACD-05 Issue No: 01 Revision :01

ASSIGNMENTS

DEPARTMENT OF ELECTRONICS AND INTRUMENTATION DEPARTMENT : EIE FACULTY NAME : S.JANAKIRAMAN SUBJECT & CODE : EC1461 FACULTY CODE : EIEFO7 SEMESTER : VIII CLASS / BATCH : EIE8/2007-2011

UNIT NO.

TOPICS BOOKS TO BE

REFERRED

DATE OF ANNOUNCE

MENT

DATE OF SUBMISS

ION


Hindustan University Format No ACD-06 Issue No: 01 Revision :01

SELF STUDY TOPICS

DEPARTMENT OF ELECTRONICS AND INTRUMENTATION DEPARTMENT : EIE FACULTY NAME : S.JANAKIRAMAN SUBJECT & CODE : EC1461 FACULTY CODE : EIEFO7 SEMESTER : VIII CLASS / BATCH : EIE8/2007-2011

UNIT NO.

TOPICS BOOKS/JOURNALS SUGGESTED

Faculty In-Charge HOD



ATTACHED ACADEMIC PROGRAMS

PROGRAM NAME

DATE & TIME

DETAILS

GUEST LECTURES

INDUSTRIAL VISITS

SEMINARS

Faculty In-Charge HOD



INTERNAL EXAM RESULT ANALYSIS DEPARTMENT : EIE FACULTY NAME : S.JANAKIRAMAN SUBJECT & CODE : EC1461 FACULTY CODE : EIEFO7 SEMESTER : VIII CLASS / BATCH : EIE8/2007-2011 Total Number of students: 65 Academic Year: 2010-2011 Passing Minimum : 45 / 50 %

Unit test/ Model Exam

Date Number of Students Signature

Remarks Attended Passed Failed Pass% Faculty HOD

Test I 25/01/2011 50 32 18 64

ANALYSIS

Unit Test/ Mode l Exam

Number of Students Remarks

<45/50% 45/50-60% 60-75% 75-100%

Test I 18 8 11 13

Note: Attach separate files for corrective and preventive actions taken

Name of the Student :

(a) Marks obtained in tests :

Tests Subject Marks

Remarks

Test 1 Test 2 Model Test

(b) Attendance particulars :

Period Attendance Percentage Remarks End of 1st month End of 2nd month End of the semester

(c) University Exam results :

Subjects Marks obtained Pass / Fail

(d) Arrear details :

Name of the student

Counselling date

Counselling remarks Student

Signature

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