1 eeng 2710 project synchronous counters. 2 counters counter: a sequential circuit that counts...
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EENG 2710 Project
Synchronous Counters
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Counters
Counter: A Sequential Circuit that counts pulses. Used for Event Counting, Frequency Division, Timing, and Control Operations.
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Synchronous Counters
• A counter whose flip-flops are all clocked by the same source and change state in synchronization.
• The memory section keeps track of the present state.• The control section directs the counter to the next state
using command and status lines.
Present state
Directs to next state
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Counter Terminology • A Counter is a digital circuit whose outputs progress in a
predictable repeating pattern. It advances one state for each clock pulse.
• State Diagram: A graphical diagram showing the progression of states in a sequential circuit such as a counter.
• Count Sequence: The specific series of output states through which a counter progresses.
• Modulus: The number of states a counter sequences through before repeating (mod-n).
• Counter directions:– DOWN - count high to low (MSB to LSB)– UP - count low to high (LSB to MSB).
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Counter Modulus
• Modulus of a counter is the number of states through which a counter progresses.
• A Mod-12 UP Counter counts 12 states from 0000 to 1011 (0 to 11 decimal). The process then repeats.
• A Mod-12 DOWN counter counts from 1011 (to 0000 (11 to 0 decimal), then repeats.
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State Diagram
• A diagram that shows the progressive states of a sequential circuit.
• The progression from one state to the next state is shown by an arrow. – (0000 0001 0010).
• Each state progression is caused by a pulse on the clock to the sequential circuit.
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MOD 12 Counter State Diagram • With each clock pulse the counter progresses by one
state from its present position on the state diagram to the next state in the sequence.
• This close system of counting and adding is known as modulo arithmetic.
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Full-sequence Counter• An n-bit counter that counts the maximum modulus (2n) is called a full-sequence counter such as Mod 2, Mod 4, Mod 8, etc.• A 4-bit mod 16 UP counter that counts up from 0000 to
1111 is an example of a full-sequence counter.
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Counter Timing Diagram (Mod-16 Full-sequence Counter)
• Shows the timing relationships between the input clock and the outputs Q3, Q2, Q1, …Qn of a counter.
• For a 4-bit mod 16 counter, the output Q0 changes for every clock pulse, Q1 changes on every two clock pulses, Q2 on four, and Q3 on 8 clocks.
• The outputs (Q0 Q3) of the counter can be used as frequency dividers with Q0 = clock 2, Q1 = clock 4, Q2 = clock 8, and Q3 = clock 16.
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Truncated Counter• An n-bit counter whose modulus is less than the maximum possible is called a truncated sequence counter, such as mod 3 (n = 2), mod 12 (n = 4). • A 4-bit mod 12 UP counter that counts from 0000 to 1011 is an example of a truncated counter
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Counter Timing Diagram (Mod-12 Truncated Counter
The outputs (Q0 Q3) of the counter can be used as frequency dividers with Q0 = clock 2, Q1 = clock 4, Q2 = clock 12, and Q3 = clock 12.
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Designing a Synchronous Up Counter
1. Define the problem. The circuit must count in binary sequence from 0000 to 1011.
2. Draw a state diagram
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Step 3 Designing a JK Flip-Flop Synchronous Up Counter
Q Q Present State Next State J K Coments
0 0 0 X No change or reset0 1 1 X Nochange or set1 0 X 1 Toggle or set1 1 X 0 Toggle or reset
JK Flip-Flop Excitation Table
State Table
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Designing a Synchronous CounterSimplify the Boolean expression for each input
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MOD-12 Synchronous Counter
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Project Assignment
Each team will do the following:
1. The team leader will chose a Mod-n JK Flip-Flop Synchronous Up Counter at random form a group of Mod-n JK Flip-Flop Synchronous Up Counter provided by the instructor.
2. Construct a state table.
3. Simplify the Boolean expression for each input using K-maps.
4. Use the simplified J and K expressions to design the Mod-n JK Flip-Flop Synchronous Up Counter.
5. Draw a Schematic Capture Diagram using Xilinx.
6. Simulate the Schematic Capture Diagram using Xilinx.
7. Write a project report in-accordance-with the IEEE format provided by the instructor.
8. Prepare and give a power point presentation.
9. Provide the instructor a paper and electronic (disc copy) of project report and presentation.
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