edc manual.docx

1. ZENER VOLTAGE REGULATOR

AIM:

To determine the line and load regulation for a given zener diode.

APPARATUS:

D.C. Source (0-30) V 1No.

Ammeter (0-30) mA, (0-20) mA 1Each.

Voltmeter (0-20) V 1No.

Variable resistance box 1No.

Zener diode (1N4735,1n4739) 1No.

Resistor (1KΩ) 1No.

Connecting wires as per required.

CIRCUIT DIAGRAM:

1

PROCEDURE:

LINE REGULATION:

1. Connect the circuit as shown.

2. The zener diode is used under reverse biased condition.

3. The reverse bias voltage Vi should be greater than the breakdown voltage to

maintain this keep the load resistance RL const at 1K.

4. Vary Vi in steps of 2V from the breakdown voltage and note down the

corresponding total current (IT) and the load current (IL).

5. Determine IZ, zener current (IT - IL).

6. Plot Vi Vs V0 to get the line regulation characteristics.

LOAD REGULATION:

1. Adjust Vi to slightly greater than the breakdown voltage and keep it constant.

2. Vary the load resistance RL such that to set current in steps of 1mA upto 10mA.

3. Note down the corresponding total current (IT) and load current (IL)

4. Determine IZ, zener current (IT - IL).

5. Plot IL Vs VO to obtain the load regulation characteristics.

OBSERVATIONS:

LINE REGULATION:

Vin

(Volts)

IT (mA) IR (mA) Iz=IT--IL VO (volts)

LOAD REGULATION:

RL(K) IT(mA) IL(mA) IZ = IT-- IL VO(volts)

2

MODEL GRAPHS:

RESULT:

The line and load regulation characteristics were plotted. The output voltage

within certain ranges remains constant when Vi & RL are varying.

PRE-LAB QUESTIONS:

1. Explain the phenomenon of Zener breakdown & avalanche breakdown?

2. Compare the characteristics of zener diode with ordinary PN diodes both

3

forward and reverse biased conditions?

3. Compare the characteristics of zener diode with an ordinary PN diodes both

Forward and reverse biased conditions?

4. Explain how a zener diode acts as a voltage regulator for line and load

regulations?

5. Why do you use an ammeter in Micro-amps range when a diode is used in

reverse bias?

6. Differentiate between Avalanche and zener break down?

7. In what region of the characteristics you prefer to use a zener diode? Find out

Iz min and Iz max for the given configuration?

8. Explain the voltage stabilization with load in zener voltage regulator?

9. Mention applications and specifications of a zener diode?

2. DESIGN, REALIZATION AND PERFORMANCE

EVALUATION OF HALF WAVE

&

FULL WAVE RECTIFIERS

AIM:

To obtain following parameters for half wave rectifier, full wave rectifier

without filter.

1. DC Voltage

2. RMS value

3. Ripple factor

4. PIV (peak inverse voltage)

APPARTUS REQUIRED:

AC Voltmeter (0-20) V 1 No.

DC Voltmeter (0-20) V 1 No.

DC Ammeter (0-50) mA 1 No.

4

Diodes 1N 4007 2 Nos.

Transformer (Step down) 1 No.

Capacitors 100 F 2 Nos.

DRB (Decade Resistance box) 1 No.

CIRCUIT DIAGRAM:

HALFWAVE RECTIFIER

FULLWAVE RECTIFIER

PROCEDURE:

HALF WAVE RECTIFIER (WITHOUT FILTER):

1. Connect the circuit as shown in fig. with S1 open keep RL in maximum position.

2. Tabulate Vdc , Vac by varying the IL in steps of 5mA (The change of RL causes

the change of IL)

5

3. Observe the rectified output on CRO. Calculate ripple factor & compare with

theoretical value.

FULL WAVE RECTIFIER (WITHOUT FILTER)

1. Connect the circuit as shown in fig. with S1 closed keep RL in maximum

position.

2. Tabulate Vdc, Vac by varying the IL in steps of 5mA (The change of RL causes

the change of IL)


theoretical value.

TABULAR COLUMN:

RL

(Ohms)

IL

(mA)

Vac

(Volts)

Vdc

(Volts)

Ripple Factor

= Vac/dc

Theoretical

Ripple Factor

The above tabular column is same for HWR without filter. The ripple factor is in each

of the case i.e., HWR without filter and FWR without filter are calculated practically &

compared with theoretical value.

FORMULAE USED:

HWR without filter r = 1.21 f =50 Hz

6

FWR without filter r = 0.48

MODEL GRAPHS:

HALFWAVE RECTIFIER (WITHOUT FILTER)

FULLWAVE RECTIFIER (WITHOUT FILTER):

7

RESULT:

PRE LAB QUESTIONS:

1. What are the applications of rectifiers?

2. Mention the different sections of filters used in rectifiers.

3. Define the peak inverse voltage, ripple factor, power conservation, efficiency &

Voltage regulation.

4. Compare HWR, FWR & Bridge Rectifier with respect to different features i.e.,

Ripple factor, Ripple frequency, Transformer Utilization factor, PIV no. of

diodes & power conservation efficiency.

5. Give the expressions for Irms, Vrms, Idc in terms of Vm, Im.

6. Draw & explain the waveform of HWR with ‘C’ filter?

3. DESIGN, REALIZATION AND PERFORMANCE EVALUATION

OF HALF WAVE & FULL WAVE RECTIFIERS WITH

CAPACITANCE, INDUCTANCE, LC & -SECTION FILTERS

AIM: To obtain following parameters for half wave rectifier, full wave rectifier

Withfilter

DC Voltage

1. RMS value

2. Ripple factor

3. PIV (peak inverse voltage)

APPARTUS REQUIRED:

AC Voltmeter (0-20) V 1 No.



Diodes 1N 4007 2 Nos.

8

Transformer (Step down) 1 No.

Capacitors 100 F 2 Nos.

DRB (Decade Resistance box)

PROCEDURE:

HALF WAVE RECTIFIER: (WITH FILTER)

1. Connect the circuit as shown in fig. with S1 open and connect the filter (inductor

/ capacitor / LC & -section filters) at the output of the rectifier, keep RL in

maximum position.


the change of IL)


theoretical value.

CIRCUIT DIAGRAM:

HALFWAVE RECTIFIER:

FULLWAVE RECTIFIER:

9

FULL WAVE RECTIFIER (WITH FILTER):

1. Connect the circuit as shown in fig. with S1 closed and connect the filter

(inductor / capacitor / LC & -section filters) at the output of the rectifier, keep

RL in maximum position.


the change of IL)


theoretical value.

TABULAR COLOUMN:

RL

(Ohms)

IL

(mA)

Vac

(Volts)

Vdc

(Volts)

Ripple Factor

= Vac/dc

Theoretical

Ripple Factor

The above tabular column is same for HWR without filter. The ripple factor is in each

of the case i.e., HWR without filter and FWR without filter are calculated practically &

compared with theoretical value.

10

FORMULAE USED

For inductor filter ripple factor Γ=

RL

3√2 ωL

For capacitor filter ripple factor Γ= 1

4√3 fCRL

For LC filter ripple factor =√2

3.

14 ω2CL

For -section filter ripple factor =

XC 1

RL

.XC 2

X L

MODEL GRAPHS:

HALFWAVE RECTIFIER (WITH FILTER):

11

FULLWAVE RECTIFIER (WITH FILTER):

12

RESULT:

PRE LAB QUESTIONS:

1. Mention the different sections of filters used in rectifiers.

2. Define the peak inverse voltage, ripple factor, power conservation, efficiency &

Voltage regulation.

3. Draw & explain the waveform of HWR with ‘C’ filter?

4. Compare different filters.

13

4. PLOTTING THE CHARACTERISTICS OF CB, CE & CC

CONFIGURATIONS OF BJTS

AIM:

To determine input & output characteristics of a transistor under Common

base (CB) configurations.

APPARATUS:

PNP transistor (BC 558) 1No

Dual regulated power supply (0-30) V 1No

Voltmeter (0-1) V 1No

Ammeter (0-20) mA 2No’s

Resistors (3.3KΩ, 1KΩ) Each one


.

CIRCUIT DIAGRAM FOR COMMON BASE:

14

PROCEDURE FOR COMMON BASE:

INPUT CHARACTERISTICS:

1. Connect the circuit as shown in the figure.

2. Keep VCB (output voltage) constant. (Say 0.1 volt)

3. Vary VEE in steps and note down the corresponding VEB & IE.

4. Change the value of VCB and repeat the step 3 to get a set of characteristics.

5. Plot IE Vs VEB for different VCB.

OUT PUT CHARACTERISTICS:

1. The input current IE is kept constant (say 2mA) by adjusting VEE.

2. Vary VCB in steps and note down the corresponding IC.

3. Change the value of IE and for different values repeat step2.

4. Plot VCB Vs IC.

5. Plot IE Vs IC for constant. VCB using output characteristics.

OBSERVATIONS:


VCB = 0 V VCB = 1 V VCB = 2 V

VEB (V) IE (mA) VEB (V) IE (mA) VEB (V) IE (mA)

OUTPUT CHARACTERISTICS:

IE = 2mA IE = 4mA IE = 6mA

VCB (V) IC (mA) VCB (V) IC (mA) VCB (V) IC (mA)

15

CB CONFIGURATION:

IE = Input current (Emitter current)

IC = Output current (collector current)

VEB = Input voltage (emitter to base voltage)

VCB = Output voltage (collector to base voltage)

EXPECTED GRAPHS:


16


PRE-LAB QUESTIONS:

1. Compare the input resistance, output resistance, voltage gain, current gain of

different transistor configurations

2. What is Early –effect / base width modulation in transistors?

3. Why the input characteristics of transistor in CB-configurations originate from

the origin?

4. Explain the three different regions, Active, saturation and cut off, in the out put

characteristics.

5. A CB – stage is generally used as the first stage in a cascade. Why?

6. What is meant by common base configuration?

7. Define current gain in CB configuration.

8. Give the Ebers Moll representation of a NPN Transistor?

17

5.COMMON EMITTER CONFIGURATION

AIM:

To determine input & output characteristics of a transistor under Common emitter (CE) configurations.

APPARATUS:

NPN transistor (BC 547) 1No



Ammeter (0-200) µA (0-20) mA Each one

Resistors (47KΩ, 1KΩ) Each one


18

PROCEDURE:


1. Connect the circuit diagram as shown in figure.

2. Keep VCE, the output voltage constant (say 0.2V).

3. Vary VBB in steps and note down the corresponding VBE & IB.

4. For different constant value the circuit is connected as shown in the figure

carefully connecting the terminals. Now to observe the input characteristics the

output voltage VCE kept to be zero and the value of input source VBB in varied.

Such that the current IB increases in steps of 50A. The respective values for

VBE are noted. The same procedure is repeated keeping VCE at 10V, graph IB Vs

VEB is drawn and the h parameters calculated.


The voltage source VCE is varied keeping VBB and IB constant, keep IB at around 20A

and vary the output voltage VCE in steps of 0.1v and note down the current Ic. Repeat

the experiment for 30A and 40A values of IB. The h parameters can be calculated

from the graph.

CALCULATIONS:

INPUT CHARACTERISTICS OUTPUT CHARACTERISTICS

VCE = 2 V VCE = 6 V IB = 20 A IB = 40 A

VBE (V) IB ( A) VBE (V) IB( A) VCE (V) IC (mA) VCE (V) IC (mA)

19

EXPECTED GRAPHS:



20

RESULT:

Input and output characteristics are plotted on the graph.

PRE LAB QUESTIONS:

1. CE stages are equally used as middle stages in a cascade why?

2. What is the phase relation between the input and output in a C.E. amplifier?

3. Mention advantages and disadvantages of CE configuration over CB & CC?

4. Explain why CE configuration is most popular in Amplifier circuits.

5. Show the Transistor current components for a forward biased emitter

junction and reverse biased collector junction.

6. Explain the terms ICBO, ICEO and VEBO

7. Can we inter change the collector and emitter terminals in a transistor?

8. What are typical h-parameter values for a transistor in CE configuration?

21

6.COMMON COLLECTOR CONFIGURATION

AIM:

To determine input & output characteristics of a transistor under Common

Collector (CC) configuration.

APPARATUS:

NPN transistor (BC 547) 1No



Ammeter (0-500) µA, (0-20) mA Each one

Resistors (47KΩ, 1KΩ) Each one


PROCEDURE:



2. Keep VEC, the output voltage constant.

3. Vary VBB in steps and note down the corresponding VBC & IB.

22



output voltage VEC kept to be zero and the value of input source VBB in varied.

5. Such that the current IB increases in steps of 50A. The respective values for VBC

are noted. The same procedure is repeated keeping VEC at 4V, graph IB Vs VBC is

drawn.


The voltage source VEC is varied keeping VBB and IB constant, keep IB at around 20A

and vary the output voltage VEC in steps of 1V and note down the current IE. Repeat the

experiment for 30A and 40A values of IB.

CALCULATIONS:

INPUT CHARACTERISTICS OUTPUT CHARACTERISTICS

VEC = 2 V VEC = 6 V IB = 10 A IB = 20 A

VBC (V) IB ( A) VBC (V) IB (A) VEC (V) IE (mA) VEC (V) IE (mA)

EXPECTED GRAPHS:

23

RESULT:

Input and output characteristics are plotted on the graph.

PRE LAB QUESTIONS:

1. Write the applications of CC configuration.

2. Compare CC configuration with CE and CB.

3. Give the current amplification factor of CC.

7. Plotting the characteristics of CG, CS configurations of FETs

24

AIM:

1. To obtain the drain characteristics and transfer characteristics of the given N-

channel FET in CS configuration & to Determine Drain resistance (rd), Trans

Conductance (gm), Amplification factor ()

2. To obtain the input characteristics and output characteristics of the given N-

channel FET under CG configuration

APPARATUS REQUIRED:

Resistor (680 ) 1 No.

Transistor (BFW 10) 1 No.

DC Power Supply (0-30) V 2 No.



Silicon diode (BY 126) 1 No.

CIRCUIT DIAGRAM FOR COMMON SOURCE CONFIGURATION:

PROCEDURE:

DRAIN CHARACTERISTICS:

25

1. Note the type no. of FET connected to the experimental board and trace the

circuit.

2. Make the circuit connections as shown in fig. Use milli-ammeter and electronic

voltmeter of suitable ranges.

3. For drain characteristics fix Vgs at some value, say 0 V. Increase the Vdd slowly

in steps and note down the Vds and Id for each value of Vdd. Now change Vgs to

another value (say –1V, –2V, –3V) and repeat the above. This way take

readings for different Vgs voltages.

4. Plot the drain characteristics on the graph (between Id and Vds for fixed values of

Vgs).

TRANSFER CHARACTERISTICS:

1. Fix Vds at 4V. Increase the Vgg slowly in steps and note down Vgs and Id for each

set of Vds. Now change the Vds to another value, say 3V and repeat the above.

2. Plot the transfer characteristic on the graph (between Id and Vgs for fixed values of

Vds).

3. Determine the drain resistance, Trans conductance and amplification factor

from the above curves.

OBSERVATIONS:

DRAIN CHARACTERISTICS:

Vgs = 0 V Vgs = -1 V Vgs = -2 V

Vds (V) Id (mA) Vds (V) Id (mA) Vds (V) Id (mA)

TRANSFER CHARACTERISTICS:

Vds = 2 V Vds = 4 V Vds = 6 V

Vgs (V) Id (mA) Vgs (V) Id (mA) Vgs (V) Id (mA)

26

EXPECTED GRAPHS:

DRAIN CHARACTERISTICS WAVEFORM:

TRANSFER CHARACTERISTICS WAVEFORM:

27

CALCULATIONS:

1. Drain resistance rd = ∆Vds / ∆Id = ___________ K Ohms, where Vgs is constant

2. Trans conductance, gm = ∆Id / ∆Vgs =________ Ohms, where Vds is constant.

3. Amplification factor, μ = rdgm = ∆Vds / ∆Vgs ___________ where Id is constant.

RESULT:

The parameters i.e., μ, gm, rd are calculated from the obtained drain and

transfer characteristics.

CIRCUIT DIAGRAM FOR COMMON GATE CONFIGURATION

28

PROCEDURE:


1. Note the type no. of FET connected to the experimental board and trace the

circuit.

2. Make the circuit connections as shown in fig. Use milli-ammeter and electronic

voltmeter of suitable ranges.

3. For input characteristics fix Vdg at some value, say 1V. Increase the VSS slowly

in steps and note down the VSG and IS for each value of VSS. Now change VDG to

another value (say 2V, 3V) and repeat the above.

4. Plot the input characteristics on the graph (between IS and VSG for fixed values

of VDG).


1. Fix VSG at 1V. Increase the VDD slowly in steps and note down VDG and Id for

each set of VDD. Now change the VSG to another value, say 3V and repeat the

above.

2. Plot the output characteristic on the graph (between Id and VDG for fixed values of

VSG).

OBSERVATIONS:

29


VDG = 1 V VDG = 2 V VDG = 3 V

VSG (V) IS (mA) VSG (V) IS (mA) VSG (V) IS (mA)


VSG = 1 V VSG = 2 V VSG = 3 V

VDG (V) Id (mA) VDG (V) Id (mA) VDG (V) Id (mA)

RESULT:

Input & output characteristics are plotted.

PRELAB QUESTIONS:

1. Name the different regions in case of transfer-mutual characteristics of FET.

2. What is the channel-length modulation in FET?

3. What is pinch-off voltage in FET?

4. Define the terms μ, gm, rd in FET.

5. What is the difference between depletion MOSFET and enhancement

MOSFET?

6. What are the advantageous of FET over a BJT?

7. Compare J FET with a MOSFET. Mention at least two applications of a FET.

8. Why a FET is UNIPOLAR DEVICE?

30

8. BJT BIASING

AIM:

Using the given transistor to find the components needed for the given bias conditions

APPARATUS:

DC power supply (0-30) V 1No

Transistor(BC 107) 1No.

DMM(Digital multimeter) 1No

Ammeter(0-100)mA 1No


DRB (Decade resistance box) 3No’s


A) FIXED BIAS:

Given:

1. Transistor number: , = (find from the data sheet for the given transistor)

2. Choose a given combination of conditions: VCC, ICQ, VCEQ, from below

a. VCC =10V/12V/15V/20V

b. ICQ = 50mA/75mA/100mA

c. VCEQ =5V/6V/10V/12V

GIVEN CONDITIONS:

For the given transistor (ensure ICQ 0.5ICmax, for any two or three combinations of

conditions above) Viz.,

1. VCC = 10V, ICQ=50mA,VCEQ=5V

2. VCC = 10V, ICQ=100mA,VECQ=5V

3. VCC = 12V, ICQ = 75mA,VCEQ = 6V

4. VCC = 12V, ICQ = 100mA, VCEQ = 7.5V

31

CIRCUIT DIAGRAM:

Fixed bias circuit is shown below (the BE junctionn and BC junction have fixed value

of bias determined by RB):

- Find the values of RB & RC and verify (by actual measurement) the values of

ICQ,IBQ,VBEQ.

- Assume for silicon transistor V BE(act) = V BEQ =0.7V

DESIGN STEPS:

Step 1.

- For the given combinations of specifications (Viz., chosen: VCC=10v , ICQ =100 mA

& VCEQ =5v) find RC and RB . Using IC/IB=β and & writing the output loop equation,

gives

VCC = ICQRC+VCEQ i.e., ICQ = (VCC-VCEQ)/RC

i.e., RC =(VCC – VCEQ)/ICQ IBQ = ICQ/β,

32

RB VCC/IB , (since RB =(VCC-VBEQ)/RB VCC/RB, as VBEQ<<VCC)

- For the given Design Conditions laid down in step1 above, connect the circuit

diagram using the values of RB, RC obtained above.

- Find the values of VCEQ, ICEQ from the measurement and find the stability factor SI

from SI = β+1.

Step 2 :

- Repeat the step 1 for the other three combinations of conditions given above and

tabulate the results in the table below

S.No Design Values

(Determined)

Combination of

Conditions chosen

Values

observed SI

RC in RB in VCC ICEQ VCEQ ICQ VCEQ

B. COLLECTOR TO BASE BIAS:

CIRCUIT DIAGRAM:

- Collector to base circuit diagram is shown below

33

DESIGN STEPS: Choose the conditions: VCC=12v, ICQ=75mA, VCEQ=6v

Step 1

- Writing the output loop equations, we have:

VCC = (IC+IB) RC+VCE

- Find the values of RC and RB using β = IC/IB

RC≈ (VCC-VCEQ)/IC

RB = (VCEQ-VBE)/IB

- For the given combinations of specifications find RC, RB and verify the values of ICQ

& VCEQ from measurements.

- Find also

SI = (1+β)/(1+β(RC/RC+RB))

Step 2:

- Repeat step 1 for other combination of conditions also

S.No Design Values

(Determined)

Combination of

Conditions chosen

Values

observed SI

RC in RB in VCC ICEQ VCEQ ICQ VCEQ

C) Self Bias:

34

CIRCUIT DIAGRAM:

- Self bias circuit is shown below

DESIGN STEPS:

Step 1:

- Choose the conditions: VCC = 15v, ICQ = 50mA, VCEQ = 7.5v

- Writing the mesh equations

VCC = ICQ(RC+RE)+VCEQ

(RC+RE) = (VCC-VCEQ)/ICQ

- For given VCEQ, ICQ (assuming RE = 470 Ώ) find RC

- Find RBB (assuming R2 = 4.7 KΏ, R1 = 47 KΏ, RE = 470 Ώ) , using

RBB = R1R2/(R1+R2).

- Find

VBB = VCCR2/(R1+R2) and

SI = (1+)/(1+(Re/(Re+RBB)))

- For different values of Re = 470, 1K tabulate the results finding SI and verify other

parameters.

35

S.

No

Design Values

(Determined)

Combination of

Conditions chosen

Values

observed SI

R1 in R2 in RC in RB in VCC ICEQ VCEQ ICQ VCEQ

CALCULATIONS & CONCLUSIONS:

PRELAB QUESTIONS:

1. Define the term ‘Biasing’?

2. List different types of stability factors?

3. What is the need of Biasing?

4. Which method of Biasing is more suitable in most applications?

36

9. FET BIASING

AIM:

Using the given FET find the components needed for the given bias conditions

APPARATUS:

DC power supply (0-30) V 1No

FET (BFW 11) 1No.

DMM (Digital multimeter) 1No

Ammeter (0-100) mA 1No

Voltmeter (0-10)V 1No

DRB(Decade resistance box) 3No’s


FIXED BIAS:

CIRCUIT DIAGRAM:

- Fixed bias circuit is shown below:

37

DESIGNING EQUATIONS:

V G=I G RG From the circuit −V GG−V GS=0

I D=IDSS (1−VGSV P )

2

from the output loop

V DS+ I D RD−V DD=0

V DS=V DD−I D RD

B) SELF BIAS:

CIRCUIT DIAGRAM:

- Self Bias circuit diagram is shown below

38

The drain voltage, V D=V DD−I D RD

V DS=V D−V S

V DD -ID RD -ID RS

V DD−I D( RD+RS )

V GS=V GG−V S=0−I D RS=−I D RS

C) VOLTAGE DIVIDER BIAS:

CIRCUIT DIAGRAM:

- Voltage Divider Bias Circuit is Shown Below

DESIGNING EQUATIONS:

The gate voltage V GG=( R2

R1+R2)V DD

and Rg=

R1 R2

R1+R2

The bias line satisfies the equation V GS=V GG−I D RS

V D=V DD -ID RD

39

PRELAB QUESTIONS:

1. Define the term ‘Biasing’.

2. What is the need of Biasing?

3. Which method of Biasing is more suitable in most applications?

40

10. MEASUREMENT OF TRANSISTOR H-PARAMETERS IN

COMMON EMITTER CONFIGURATION

AIM:

1. To determine input & output characteristics of a transistor under common

emitter (CE) configuration.

2. To determine the h parameters (hybrid parameters) hie, hre, hfe and hoe from

the characteristics.

APPARATUS :

Regulated power supply (0-30) V 1No

D.C. Voltmeter(0-1) V 1No

Ammeters(0-200) µA,(0-20)mA Each one

PNP transistor(BC 547) 1No

CIRCUIT DIAGRAM:

PROCEDURE:



2. Keep VCE, the output voltage constant (say 0.2V).

3. Vary VBB in steps and note down the corresponding VBE & IB.

41



output voltage VCE kept to be zero and the value of input source VBB in varied.

Such that the current IB increases in steps of 50A. The respective values for

VBE are noted. The same procedure is repeated keeping VCE at 10V, graph IB Vs

VEB is drawn and the h parameters calculated.


The voltage source VCE is varied keeping VBB and IB constant, keep IB at around 20A

and vary the output voltage VCE in steps of 0.1v and note down the current Ic. Repeat

the experiment for 30A and 40A values of IB. The h parameters can be calculated

from the graph.

CALCULATIONS:

PARAMETERS VALUE DETERMINED

hie

hre

h fe

hoe

42

EXPECTED GRAPHS:

INPUT CHARACTERISTICS

43

OUTPUT CHARACTERISTICS

CALCULATIONS:

1. hfe = input resistance (Rr) =

ΔV BE

ΔI B

=………….. Ohms where VCB is constant

2. hre = Reverse Transfer ratio =

ΔV BE

ΔICE

=…………., where IB is constant

3. hfe = βAC = forward current ratio =

ΔIC

ΔI B

=……….. where VCE is constant

βDC = IC/IB

4. hOe = Output dynamic admittance (1/r0) =

ΔIC

ΔV CE

=…………. where IB is

constant.

PRELAB QUESTIONS:

1. Why Hybrid parameters are called so? Define them?

2. What are the salient features of hybrid parameters?

3. Derive the equations for voltage gain, current gain input impedance and output

admittance for a BJT using low frequency h-parameter model for CE

configuration.

44

11. CHARACTERISTICS OF SPECIAL DEVICES-UJT, SCR

AIM: 1. To study the emitter characteristics of UJT.

2. To study the characteristics of SCR.

3. To determine the forward and reverse characteristics of Tunnel diode.

APPARATUS: UJT 2N2646, SCR, Tunnel Diode

Regulated power supplies (0 – 30V), (0-300V) 1 No.

Resistor – 1 K, 680, 470 1 No.

DC Ammeters 2 Nos.

Voltmeters 1 No.

CIRCUIT DIAGRAM OF UJT:

45

PROCEDURE:

1. Connect the circuit as shown in fig.

2. Keep VBB = constant find the emitter current IE & VE varying for different

3. Repeat step 2 for different VBB & find corresponding IE by varying VEE.

VBB = 5V VBB = 10V VBB = 15V

VE IE VE IE VE IE

CALCULATIONS:

RBB = RB1 + RB2

η=RB 1

RB 1+RB 2

=RB 1

RBB

RB 1=ηRBB

RB 2=RBB−RB 1

46

V P=ηV BB

EXPECTED GRAPH:

UJT CHARACTERISTICS

RESULT: Characteristics of UJT is observed.

PRELAB QUESTIONS:

1. Give the symbol and construction diagram of UJT.

2. Why UJT is called Uni-junction transistor?

3. What is the intrinsic – stand off ratio of UJT?

4. Applications of UJT.

5. Define pinch off voltage and valley voltage of UJT.

SCR CHARACTERISTICS

SCR CIRCUIT DIAGRAM:

47

PROCEDURE:

1. Connect the circuit as shown in Fig.

2. Fix VGK to a desired value and note the values of anode current IA by

varying the anode voltage VA & IG.

3. Repeat the step 2 for different values of IG.

IG = 5µA IG = 10µA IG = 15µA

VAK (V) IA (mA) VAK (V) IA (mA) VAK (V) IA (mA)

EXPECTED GRAPH:

48

RESULT: The characteristics of a SCR are obtained.

PRELAB QUESTIONS:

1. Give the symbol and constructional diagram of SCR.

2. Working principle of SCR.

3. Applications of SCR.

12. CHARACTERISTICS OF ZENER DIODE, PHOTO DIODE,

PHOTO TRANSISTOR

AIM:

1. To determine the forward & reverse characteristics of zener diode.

2. From the graph to determine the break down voltage, static and dynamic

49

Resistances .(Forward and reverse)

APPARATUS:

D.C. source(0-30) V 1No

Ammeter(0-20)mA 1No

Voltmeter(0-1)V,(0-20)V 1No

variable resistance box 1No

zener diode(1N4735,1N4739) 1No

Resistor(1KΩ) 1No

CIRCUIT DIAGRAM:

FORWARD BIAS

REVERSE BIAS

50

PROCEDURE:

FORWARD BIAS

1. Connect the circuit as shown in figure.

2. Change the forward biased voltage (Vi) and note down the corresponding

voltage (VD) and current (ID).

3. Plot the graph VD Vs ID.

REVERSE BIAS

1. Connect the circuit as shown.

2. Change the reverse voltage from 0 to 20V in steps of 2v and note down the

3. Plot the reverse characteristics VD Vs ID.

4. From the graph determine the breakdown voltage of the diode.

OBSERVATIONS:

Forward Bias Reverse Bias

Vin

(Volts)

IR

(mA)

VZD

(Volts)

Vin

(Volts)

IR

(mA)

VZD

(Volts)

51

EXPECTED GRAPHS: FORWARD CHARACTERISTICS & REVERSE

CHARACTERISTICS

RESULT:

1. The Forward and reverse characteristics of the zener diode is plotted.

2. The breakdown voltage VZ = ____________________________

3. Static resistance

i) Forward resistance = ___________________

ii) Reverse Resistance = ___________________

4. Dynamic resistance

i) Forward = ____________________

ii) Reverse = ____________________

PRE-LAB QUESTIONS:

1. Explain the phenomenon of Zener breakdown & avalanche breakdown?

2. Compare the characteristics of zener diode with an ordinary PN diodes both

forward and reverse biased conditions?

3. Why do you use an ammeter in Micro-amps range when a diode is used in

reverse bias?

4. Differentiate between Avalanche and zener break down?

5. In what region of the characteristics you prefer to use a zener diode? Find out

Iz min and Iz max for the given configuration?

6. Mention applications and specifications of a zener diode?

52

PHOTO DIODE CHARACTERISTICS

AIM:

To plot photo diode characteristics and to determine dynamic resistance

APPARATUS:

Photo diode 1No

Voltmeter (0 – 15V) 1No

Ammeter (0-1) mA 1No

RPS (0-30) V 1No

light source resistor 1K.

OBSERVATIONS:

LUMINOUS INTENSITY = LUMINOUS INTENSITY =

Vd Id Vd Id

PROCEDURE:

1. Connect the circuit as shown in fig.

2. Increase RB voltage insteps of 0.5V and note down corresponding Vd & Id.

3. Increase the intensity of light and note down corresponding Vd & Id.

4. For various intensities plot the graph Id Vs Vd.

53

EXPECTED GRAPH:

ID Luminous Intensity

(A)

Dark Current

Reverse Voltage (V).

PRELAB QUESTIONS:

1. What is the principle of operation of photodiode?

2. What are the applications of photodiode?

3. Give the symbol and characteristics of photodiode.

PHOTO TRANSISTOR:

A phototransistor is in essence nothing more than a bipolar transistor that is encased in

a transparent case so that light can reach the base-collector junction. The

phototransistor works like a photodiode, but with a much higher responsivity for light,

because the electrons that are generated by photons in the base-collector junction are

injected into the base, and this current is then amplified by the transistor operation.

However, a phototransistor has a slower response time than a photodiode.

54

http://en.wikipedia.org/wiki/Responsivity

http://en.wikipedia.org/wiki/P-n_junction

http://en.wikipedia.org/wiki/Light

http://en.wikipedia.org/wiki/Bipolar_transistor

13. DRIVING LEDS, SEVEN SEGMENT LED/LCD DISPLAYS

AIM:

To study the operation of display device 7 segment LED and verification of BCD

to 7 segment code convector.

APPARATUS AND COMPONENTS:

1. 7447 IC

2. MAN 72 7 Segment LED Common Anode type or equivalent

3. Resistor – 470 or 1 K

THEORY:- Connect the Basic LED, which may form a single segment of common

Anode seven segment display as shown in fig. 1. the circuit can be connected.

Fig. 1

55

and note the current, voltage and light intensity for various values of R = 240 , 470

or 1 K etc.

All the segments of display are connected as shown in fig. 2.

Fig. 2. LED’s connected as seven segment

BCD TO SEVENSEGMENT DECODER:

Decimal numbers can be represented in Binary Value. To represent 0 to 9 of decimal

we need 4 bit binary number. 0000 to 1001 is for 0 to 9 numbers code where as 1010 to

56

1111 are don’t care conditions. The BCD will accepts the code 0000 to 1001 as inputs

from a Binary data generators. The IC will generate a corresponding pin of segments

are made to logic one. For example 0101 BCD code input has to give the output

segments as a = c = d = g = f = 1 (segments o/p is one)

They are connected to seven segment display and they glow as the following truth table

explains the logic of BCD to seven segment code.

Decimal Input BCD Output seven segment display

A B C D A b c d e f g

0 0 0 0 0 1 1 1 1 1 1 0

1 0 0 0 1 0 1 1 0 0 0 0

2 0 0 1 0 1 1 0 1 1 0 1

3 0 0 1 1 1 1 1 1 0 0 1

4 0 1 0 0 0 1 1 0 0 1 1

5 0 1 0 1 1 0 1 1 0 1 1

6 0 1 1 0 0 0 1 1 1 1 1

7 0 1 1 1 1 1 1 0 0 0 0

8 1 0 0 0 1 1 1 1 1 1 1

9 1 0 0 1 1 1 1 0 0 1 1

From above T.T. one can generate a logic equation and realize thus one bit

combinations for decimal number 2 is 0010 which has to produce an equivalent BCD is

1101101. To realize this in use K map and we get equivalent digital circuit. Such seven

segment circuit are embedded in 7447 IC.

The IC 7447 is a 16 pin IC in dual in line package. It is a TTL IC works on 5v.

The following output equation, in terms of BCD inputs, have been derived from the

truth table for segment a, b, etc.

a = ( 0,2,3,5,7,8,9)

b = (0,1,2,3,4,7,8,9)

c = (0,1,3,4,5,6,7,8,9)

d = (0,2,3,5,6,8)

57

PROCEDURE: Connect circuit diagram as shown fig. 3.

FIGURE 3. CIRCUIT DIAGRAM OF BCD TO SEVEN SEGMENT DECODER:

CIRCUIT DIAGRAM OF BCD TO SEVEN SEGMENT DECODER

Identify the pins corresponding to all the seven segments of display and connects the

common ground pin to ground of power supply.

Apply the BCD code at 4 input pins and change the input combinations from 0000 to

1001 and observe the display. Prepare the truth table and verify the truth table.

PRELAB QUESTIONS:

1. Draw the circuit to drive common cathode type seven segment display devices

using 7447 BCD to seven segment decoder / driver.

58

14. COMMON EMITTER TRANSISTOR AMPLIFIER

AIM:

To find the

1. Frequency response

2. Band width

3. Input impedance and

4. Output impedance of given single stage RC coupled BJT amplifier.

APPARATUS:

Transistors : BC – 107 1No.

Resistors:

47 K Ohm 1 No.

4.7 K Ohm 2 Nos.

10 K Ohm 1 No.

1K Ohm 1 No.

1 F 2 Nos.

100 F/25v 1 No.

DC Power Supply 1 N0.

Signal Generator 1 N0.

Cathode ray Oscilloscope 1 No.

Decade Resistance Box 1 No.

Grew board 1 No.


DESIGN:

Choose VCC = : R1 = ICQ =

R2 = VCEQ =

VBB = R2 X VCC = - - - - - - -

R2 + R1

VE = VBB - VBE =

VE / ICQ = RE

VCEQ = VCC – (RC + RE) ICQ

59

Calculate RC =

Input Impedance = (R1 R2) hie

Out put impedance = RC

Voltage gain AV = V0 / Vi = -hfe RC / hie

CIRCUIT DIAGRAM:

PROCEDURE:

1. Connect the circuit as shown in the figure.

2. Find the maximum signal handling capacity. For this keep the frequency of input

signal at 5 kHz and increase the amplitude of input signal till the output gets

distorted. Then that maximum value of input signal is maximum signal handling

capacity.

60

3. Now keep the amplitude of input signal less than the maximum signal handling

capacity and vary the frequency in the range 10 Hz to 1 MHz. And for each and

every frequency find the corresponding output.

4. Find the gain of the circuit at different frequencies.

5. Make a plot of gain in db Vs frequency and the plot is called frequency response

curve.

6. Find the bandwidth from the graph.

7. For finding the input impedance of the circuit keep the frequency of input signal at

1khz find the values of Vs and Vi. Input impedance can be calculated from the

formula given below.

8. For finding the output impedance of the circuit initially first find the output voltage

without connecting any load. After that connect decade resistance box at output

terminals and vary its resistance till output voltage becomes half. Then that

resistance is the out put impedance of circuit

OBSERVATIONS:

1.Max. signal handling capacity =

2.Amplitude of input signal applied VI =

(Maintained Constants for all input frequency settings)

S.No. Frequency

(Hz)

O/P voltage V0 Gain V0/ VI Gain in dB

20 log V0 / VI

FORMULA:

Band width (BW) = fH - fL

Input impedance =

61

Output impedance =

Where VNL = No load voltage

VL = Load Voltage

MODEL WAVEFORMS:

INPUT WAVEFORM:

OUTPUT WAVEFORM:

62

EXPECTED GRAPH:

A graph is plotted between f on X – axis and 20 log V0. / VI on Y-axis. It will be as

shown figure BW = fH – f L

RESULT:

1. Frequency response curve is plotted.

2. Band width obtained from the circuit =

3. Input impedance of the circuit =

4. Output impedance of the circuit =

PRELAB QUESTIONS:

1. Why the circuit is called Single Stage RC coupled Amplifier?

2. In which frequency range this circuit is used?

3. Indicate bypass capacitor and coupling capacitor in the circuit?

4. Why the gain of the circuit decreases in low frequency region and high

frequency region?

5. How this circuit acts in low frequency region and high frequency region?

63

15. FET COMMON SOURCE AMPLIFIER

AIM:

To find the

1. Frequency response

2. Band width

3. Input impedance and

4. Output impedance of given single stage RC coupled FET amplifier.

APPARATUS:

FET -- BFW 11 -----1No.

Resistors:

1 KΩ ----- 1 No.

10 KΩ ----- 1 No.

10 KΩ ----- 1 No.

470 Ω ----- 1 No.

Capacitors:

1 F ----- 1 No.

0.01 F ----- 1No.

47 F/40V ----- 1 No.

DC Power Supply ----- 1 N0.

Signal Generator ----- 1 N0.

Cathode ray Oscilloscope ----- 1 No.

Decade Resistance Box ----- 1 No.

Grew board ----- 1 No.

DESIGN: Choose V DD = _____

VGSQ = _____

IDQ = _____

From VGSQ = --- IDQRS. Calculate RS

And VDS = VDD - ID (RS + RD)

Choose VDS, find RD

64

Now I/P impedance Zi = RG

O/P impedance Z0 = rd || RD

Voltage gain, AV = Vo / Vi = -gm (rd || RD )

CIRCUIT DIAGRAM:

PROCEDURE:

1. As per the design specifications, connect the circuit as shown.

2. Set the frequency of I/P signal at 5KHz and increase the amplitude, till O/P gets

distorted. The value of I/P signal is maximum signal handling capacity.

3. Set the I/P signal at a constant value, less than the maximum signal handling

capacity, vary frequency in the range 10Hz to 1MHz and find O/P voltage for

each and every frequency.

4. Calculate voltage gain at each and every frequency.

5. Plot the frequency versus gain and determine fH and fL.

6. Calculate bandwidth fH - fL.

7. Procedure for measuring input impedance: Set the signal generator frequency at

2KHz and measure Vs and Vi. Then Ii = Vs - Vi / RS.

I/P impedance = Vi / Ii

65

8. Procedure for measuring O/P impedance: Open the O/P circuit and measure

voltage (V open) across O/P using CRO. After connecting DRB at O/P

terminals, vary the resistance to make the O/P (Vopen) become to half of its

value. Then existing resistance in DRB is its O/P resistance.

OBSERVATIONS:

1. Max. Signal handling capacity=

2. Amplitude of input signal applied Vi = ------------------- V

(Maintained Constant for all input frequency settings)

S. No. Frequency f O/P voltage V0 Gain V0/ VI Gain in dB

20 log V0 / VI

(1)

(2)

(3)

(4)

FORMULA: Band width BW = fH - fl

Input impedance =

Output impedance =

Where VNL = No load voltage

VL = Load Voltage

MODEL GRAPH

66

GRAPH: A graph is plotted between f on X – axis and 20 log V0 / VI on Y-axis. It will

be as shown in figure.

BW = fH – f L

RESULT:

1. Frequency response curve is plotted.

2. Band width obtained from the circuit =

3. Input impedance of the circuit =

4. Output impedance of the circuit =

PRELAB QUESTIONS:

67

1. What type of biasing is used in this circuit?

2. Draw the AC equivalent circuit of FET amplifier.

3. Why this circuit is called Single Stage RC Coupled FET amplifier?

4. Why the gain of the circuit decreases in low frequency and high frequency

regions?

5. How this circuit acts in LF and HF regions?

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