Lecture #19 1

EE251: Tuesday October 29• Higher Frequency Clock via Phase Locked Loop• TIMER MODULE: SysTick-Basis of next week’s lab

– Section 12.4 and 18 in text describes our SysTick– Section 2.5 of Valvano’s Real Time Interfacing text– Several SysTick slides are from Dr. Jonathan Valvano,

University of Texas• SysTick Use of Interrupts

• Lab 5 Due This Week• Lab 6 (AtoD Conversion) Do This Week; due next• Homework #5 Due Thursday 4 pm• Lab 7 (SysTick Timer) Next Week

PLL: Phase-Locked Loop

• Internal oscillator requires minimal power but is imprecise• External crystal provides stable bus clock• TM4C is equipped with 16 MHz external crystal and bus clock

can be set to a maximum of 80 MHz• See Wikipedia’s entry on “Phase-Locked Loop” for explanation

RefClk

MainOsc

Externalcrystal

OSCSRC

16 MHzInternal Osc /4

Phase/FreqDetector

ChargePump/LPF

Up

Down

/m

VCO

BYPASS

Phase-Lock-Loop

400 MHz

USESYSDIV

/n

SYSDIV

Mux

Mux

Mux

00

01

10*

0

1

0

1

XTAL

/2

DIV400

Mux

0

1

200 MHz

30 kHzInternal Osc

11** can't drivethe PLL

2Lecture #19

Phase-Locked Loop

3Lecture #19

• Software to enable the phase-lock loop is not worth the effort to explain in this course.

• Example source code to enable changing the system clock frequency is available in “Code Files” on our lab web page. We havetested this code.– PLL.s subroutine to enable PLL– PLL_main.s program to demonstrate its use

• Used with Precision Clock (external crystal)

SysTick Timer• Timer/Counter operation

– 24-bit counter decrements at system clockfrequency (or precision clock frequency ÷ 4)

• 16 MHz system clock ⇒ 62.5 ns decrements• 16 MHz precision clock ⇒ ____ ns decrements

– Counting is from n 0• Setting n appropriately will make the counter a

modulo n+1 counter. That is:– next_value = (current_value-1) mod (n+1)– Sequence: n,n-1,n-2,n-3…2,1,0,n,n-1…

– E.g. Find n for a 1 ms. count to 0 at 16 MHz?For system clock: 1ms/62.5ns = 16,000 = n+1 or n = 15,999Will this fit in 24 bits? How big can n be? How much time is this?

Lecture #19 4

SysTick Timer

• Initialization (4 steps)– Step1: Clear ENABLE bit to stop counter– Step2: Specify the RELOAD value n (from previous slide)– Step3: Clear the counter by writing to register

NVIC_ST_CURRENT_R– Step4: Set CLK_SRC=1 (system) or 0 (precision) and specify

whether interrupt action via INTEN in NVIC_ST_CTRL_R• For details, see the Tiva TM4C123GH6PM

Microcontroller Data Sheet, Sect. 3.1.1, p. 123 and Section 3.3, pp. 137-141

Address 31-24 23-17 16 15-3 2 1 0 Name $E000E010 0 0 COUNT 0 CLK_SRC INTEN ENABLE NVIC_ST_CTRL_R $E000E014 0 24-bit RELOAD value NVIC_ST_RELOAD_R $E000E018 0 24-bit CURRENT value of SysTick counter NVIC_ST_CURRENT_R

Lecture #19 5

SysTick Registers

SysTick Status

Lecture #19 6

Lecture #19 7

SysTick Control

Lecture #19 8

Lecture #19 9

SysTick_Init; disable SysTick during setup

LDR R1, =NVIC_ST_CTRL_RMOV R0, #0 ; Clear Enable STR R0, [R1]

; set reload to reload valueLDR R1, =NVIC_ST_RELOAD_R LDR R0, =0x00FFFFFF; ; Specify RELOAD valueSTR R0, [R1] ; reload this value

; writing any value to CURRENT clears itLDR R1, =NVIC_ST_CURRENT_R STR R0, [R1] ; clear counter

; enable SysTick with core clockLDR R1, =NVIC_ST_CTRL_R MOV R0, #0x0005 ; Enable but no interrupts (later)STR R0, [R1] ; ENABLE with System ClockBX LR ; Return from subroutine

SysTick Timer Setup Subroutine

Lecture #19 10

Time Delay Subroutine (Polling);------------SysTick_Wait------------; Time delay using busy wait.; Input: R0 delay parameter in ticks of the core clock ; Using 16 MHz internal clock, tick is 62.5 nsec; Output: none; Modifies: R1SysTick_Wait

SUB R0, R0, #1 ; delay-1LDR R1, =NVIC_ST_RELOAD_R STR R0, [R1] ; time to waitLDR R1, =NVIC_ST_CURRENT_R STR R0, [R1] ; any value written to CURRENT clearsLDR R1, =NVIC_ST_CTRL_R

SysTick_Wait_loopLDR R0, [R1] ; read statusANDS R0, R0, #0x00010000 ; bit 16 is COUNT flagBEQ SysTick_Wait_loop ; repeat until flag setBX LR ; flag set, so return from sub

Lecture #19 11

Delay Using SysTick_Wait;------------SysTick_Wait10ms------------; Call this routine to wait for R0*10 ms; Time delay using polling. This assumes 16 MHz internal clock; Input: R0 number of times to wait 10 ms before returning; Output: none; Modifies: R0DELAY10MS EQU 160000 ; clock cycles for 10 ms delaySysTick_Wait10ms

PUSH {R4, LR} ; save R4 and LRMOVS R4, R0 ; R4 = R0 = remainingWaitsBEQ SysTick_Wait10ms_done ; R4 == 0, done

; SysTick_Wait10ms_loopLDR R0, =DELAY10MS ; R0 = DELAY10MSBL SysTick_Wait ; wait 10 msSUBS R4, R4, #1 ; remainingWaits--BHI SysTick_Wait10ms_loop ; if(R4>0), wait another 10 ms

; SysTick_Wait10ms_donePOP {R4, PC} ; pop R4 and Return

Lecture #19 12

SysTick Timer Methods

Lecture #19 13

• Method just shown uses polling.– When would using polling be appropriate?

• Will show how to initiate and use interrupts– Frees up processor for other tasks– Basis for Real-Time systems

• SysTick Interrupts will be used in Lab 7 – Also Precision Clock, but no PLL

But First –Set Up SysTick ISR Vector

Lecture #19 14

From Startup:

; The vector table.

;

EXPORT __Vectors

__Vectors

DCD StackMem + Stack ; Top of Stack

DCD Reset_Handler ; Reset Handler

DCD NMI_Handler ; NMI Handler

DCD HardFault_Handler ; Hard Fault Handler

DCD MemManage_Handler ; MPU Fault Handler

DCD BusFault_Handler ; Bus Fault Handler

DCD UsageFault_Handler ; Usage Fault Handler

DCD 0 ; Reserved

DCD 0 ; Reserved

DCD 0 ; Reserved

DCD 0 ; Reserved

DCD SVC_Handler ; SVCall Handler

DCD DebugMon_Handler ; Debug Monitor Handler

DCD 0 ; Reserved

DCD PendSV_Handler ; PendSV Handler

DCD SysTick_Handler ; SysTick Handler

Simple SysTick Data Structures

15Lecture #19

NVIC_ST_BASE EQU 0xE000E000CTRL EQU 0x10 ; Offsets from baseRELOAD EQU 0x14CURRENT EQU 0x18SHP_SYSPRI3 EQU 0xE000ED20 Stack EQU 0x00000400

IMPORT OutStrIMPORT UART_InitEXPORT __main

16Lecture #19

;*********************************************************; Program area;*********************************************************

AREA |.text|, CODE, READONLY, ALIGN=2__main

BL UART_InitLDR R1, =NVIC_ST_BASEMOV R0, #0 STR R0, [R1,#CTRL] ; Turn Off SystickLDR R0, =0xFFFFFFSTR R0, [R1,#RELOAD] ; Set reload valueSTR R0, [R1,#CURRENT] ; Reset current counter valueLDR R2, =SHP_SYSPRI3MOV R0, #0x40000000STR R0, [R2] ; Set Systick interrupt priorityMOV R0, #2_0011 ; Turn on Systick with Precision ClockSTR R0, [R1,#CTRL] ; and enabling interrupts

CPSIE I ; Enable Interruptswait WFI ; Sleep, waiting for interrupts

B wait

Simple SysTick – Main Program

17Lecture #19

;*********************************************************; SysTick ISR;*********************************************************

EXPORT SysTick_HandlerSysTick_Handler

PUSH {LR}LDR R0,=helloBL OutStrPOP {LR}BX LRALIGN

hello DCB "Hello from SysTick",0x0D,0x04

ALIGN END

Simple SysTick ISR

Enable SysTick Interrupts

18Lecture #19

SysTickInts.s enables interrupts in SysTick (from TI/Texas U)

; **************SysTick_Init*********************; Initialize SysTick periodic interrupts, priority 2; Input: R0 interrupt period Units of period are 1/clockfreq; Maximum is 2^24-1 Minimum is determined by length of ISR; Output: none Modifies: R0, R1, R2, R3SysTick_Init

; start critical sectionMRS R3, PRIMASK ; save old statusCPSID I ; mask all interrupts(except faults); disable SysTick during setupLDR R1, =NVIC_ST_CTRL_R ; R1 is pointer to NVIC_ST_CTRL_RMOV R2, #0STR R2, [R1] ; disable SysTick; maximum reload valueLDR R1, =NVIC_ST_RELOAD_R ; R1 is pointer to NVIC_ST_RELOAD_RSUB R0, R0, #1 ; counts down from RELOAD to 0STR R0, [R1] ; establish interrupt period; any write to CURRENT_R clears itLDR R1, =NVIC_ST_CURRENT_R ; R1 is pointer to NVIC_ST_CURRENT_RSTR R2, [R1] ; writing to counter clears it

Enable SysTick Interrupts

19Lecture #19

SysTickInts.s continued

; set NVIC system interrupt 15 to priority 2LDR R1, =NVIC_SYS_PRI3_R ; R1 = &NVIC_SYS_PRI3_R (pointer)LDR R2, [R1] ; friendly accessAND R2, R2, #0x00FFFFFF ; R2 = R2&0x00FFFFFF (clear interrupt 15

; priority)ORR R2, R2, #0x40000000 ; R2 = R2|0x40000000 (interrupt 15 priority

; is in bits 31-29)STR R2, [R1] ; set SysTick to priority 2

; enable SysTick with core clockLDR R1, =NVIC_ST_CTRL_R ; R1 = &NVIC_ST_CTRL_R

; ENABLE SysTick (bit 0), INTEN enable interrupts (bit 1), and ; CLK_SRC (bit 2) is internal

MOV R2, #(NVIC_ST_CTRL_ENABLE+NVIC_ST_CTRL_INTEN+NVIC_ST_CTRL_CLK_SRC)STR R2, [R1] ; store a 7 to NVIC_ST_CTRL_R

; end critical sectionMSR PRIMASK, R3 ; restore old statusBX LR ; return

SysTick Interrupt Handler

20Lecture #19

PeriodicSysTickInts.s SysTick Interrupt Handler from TI/Texas U

EXPORT SysTick_Handler ; SysTick Interrupt Service RoutineSysTick_Handler; increment Counts

LDR R2, =Counts ; R2 = &Counts (pointer)LDR R3, [R2]ADD R3, R3, #1 ; R3 = R3 + 1 (Counts = Counts + 1)STR R3, [R2] ; (overflows after 49 days)

; Change LEDLDR R2, =GPIO_PORTF_DATA_R ; R2 = &GPIO_PORTF_DATA_R (pointer)

AND R3, #0x0000000E ; Keep LED bits only

STR R3, [R2] ; Store back into Port F Data RegisterBX LR ; return from interrupt

; Is this just a regular subroutine return???

SysTick Main Program

21Lecture #19

PeriodicSysTickInts.s Skeleton of main program from TI/ Texas U

StartBL PLL_Init ; 50 MHz clock

; activate clock for Port F

; set direction register

; regular port function

; enable digital port

; configure as GPIO

; disable analog functionality

; initialize CountsLDR R1, =Counts ; R1 = &Counts (pointer)MOV R0, #0 ; R0 = 0STR R0, [R1] ; [R1] = R0 (Counts = 0); enable SysTickMOV R0, #0x00FFFFFF ; initialize SysTick timer for slow interruptsBL SysTick_Init ; enable SysTickCPSIE I ; enable interrupts and configurable fault

; handlers (clear PRIMASK)loop

WFI ; wait for interruptB loop ; unconditional branch to 'loop'

SysTick Summary

22Lecture #19

• SysTick can be used as a time delay• It is most powerful as method for creating

interrupts on a fixed interval• Programming SysTick is straightforward

– Creating a real-time system based on it is a bit more complex, but fixed-time interrupts is required in many real system environments

• See both Lecture and Lab Examples• Next topic: Timer Module, a Major Topic

and basis for Lab #8.