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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 7, JULY 2012 2277

Low-Power Wireless Power DeliveryErez Falkenstein, Student Member, IEEE, Michael Roberg, Student Member, IEEE, and Zoya Popović, Fellow, IEEE

Abstract—This paper addresses design and implementation ofintegrated rectifier-antennas (rectennas) for wireless powering atlow incident power densities, from 25 to 200 W/cm . Source–pullnonlinear measurement of the rectifying devices is compared toharmonic-balance simulations. Optimal diode RF and dc imped-ances for most efficient rectification, as a function of input power,are obtained. This allows optimized antenna design, which caneliminate or simplify matching networks and improve overall effi-ciency. As an example of the design methodology, Schottky diodeswere characterized at 1.96 GHz and an antenna is matched to theoptimal complex impedance for the most efficient rectifier. Forincident power density range of interest, the optimal impedanceis , with an RF to dc conversion efficiency of therectifying circuit alone of 63% and total rectenna efficiency of54%.

Index Terms—Harmonic balance, rectenna, rectification,source–pull, wireless powering.

I. INTRODUCTION

T HERE HAS been an increased demand for wireless sen-sors for data gathering and transmission where running

wires to power a device or changing/charging batteries is diffi-cult. Often, the data is gathered at locations that are difficult toaccess, that need to be covert, and/or where the sensors cannotbe easily maintained. Some examples are implanted sensorsfor medical diagnostics and therapy [1], structural monitoringsensors [2], sensors inside hazardous manufacturing or otherhazardous environments, sensors for health monitoring ofpatients or in assisted living environments [3], aircraft healthmonitoring [4], and sensors for covert operations. Two ex-tremes in terms of incident power levels are RF identifications(RFIDs) and power beaming. In RFIDs, an interrogating RFwave, typically in the UHF range, delivers power to the sensorat short range [5], [6]. Often the antennas are in each other’snear fields and the power transfer is accomplished through ca-pacitive, inductive, or resonant coupling. The results presentedin this paper are for low power levels as in RFID tags and couldallow more functionality in active RFIDs. On the other hand,far-field power beaming has been demonstrated for variousapplications requiring higher power [7]–[11]. In most of thiswork, directive antennas were used with high power densities,on the order of a few 10 W/cm with efficiencies rangingfrom 20% to 80%.

Manuscript received November 02, 2011; accepted February 01, 2012. Dateof publication May 09, 2012; date of current version June 26, 2012. This workwas supported by the National Science Foundation (NSF) under CollaborativeGrant ECCS 0701780, and by RERC 0000072549/FY10.050.006/2-5-58393.The authors are with the Department of Electrical, Computer and Energy En-

gineering, University of Colorado at Boulder, Boulder, CO 80309-0425 USA(e-mail: [email protected]).Color versions of one or more of the figures in this paper are available online

at http://ieeexplore.ieee.org.Digital Object Identifier 10.1109/TMTT.2012.2193594

Fig. 1. Block diagram of a wireless powering system. An RF power transmittertransmits a plane wave incident on a rectenna element or array (RF power re-ceiver). Following rectification is a dc stage with power management. In thispaper, we consider a narrowband low-power nondirectional power transmitter.The electronic application for this study is a wireless sensor platform. The powerdensity at the receiver is between 25–200 W/cm .

For any low power sensor that operates at a low duty cycleand in an environment with low levels of light or vibration,RF wireless powering offers the potential for maintenance-freeoperation. This paper focuses on a methodology for designinglow-power nondirectional power-receiving devices, which con-sist of an antenna integrated with a rectifier and dc load, asshown in Fig. 1. The electronic application (e.g., sensor anddata transceiver) is connected to the rectifier through an adap-tive power management circuit described in Section V.Table I gives an overview of example power receiving de-

vices described in the literature. It is important to note that theefficiencies are listed as reported in the papers, but they cannotbe directly compared due to the different power levels, andperhaps more critically, different efficiency definitions. For ex-ample, most work does not include the antenna efficiency orcoupling efficiency from antenna to the rectifier. The power in-cident on the rectifier is measured in a circuit with no antennaor estimated from simulation, e.g., [12].In some cases, the incident power density is also provided. In

[13]–[17], power levels incident on the diode are in the 100-mWrange with 40%–82% rectification efficiency. In [17], the recti-fier was directly connected to a generator, with no antenna. In[18], the 42% efficiency is measured as the ratio of the dc powerand the estimated input power to the diode of 0.1 mW for a fairlylarge antenna area whose total dimensions are not given in thepaper. In [19], a 48-element dipole array with a corporate feedwas coupled to a single diode, allowing high input power to thediode at low power densities (5 W/cm ), but with a strongdependence on antenna orientation due to high antenna arraygain. In [20], the diode impedance is optimized at the funda-mental frequency with harmonic-balance nonlinear simulationsfor 1 mW of power incident on the diode, and then the diodeis matched to a 50- antenna. The efficiency was calculated byestimating antenna gain when the antenna is not connected tothe rectifier so at least a part of the antenna efficiency is takeninto account by simulations. Reference [21] reports rectifica-tion, as well as overall integrated rectenna efficiency also found

0018-9480/$31.00 © 2012 IEEE

2278 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 7, JULY 2012

TABLE IOVERVIEW OF RECTENNAS AND RECTIFIERS DESCRIBED IN THE LITERATURE

-rectification efficiency; includes antenna efficiency, mismatch, andcoupling. linear/circular polarization (LP/CP).

from simulated unloaded antenna gain for 10-mW estimated in-cident power on a four-diode rectifier. The rectifier is integratedwith the antenna on the same substrate, and the overall device iscompact. Reference [22] presents 64 dc-connected dual-circu-larly polarized broadband spirals with diodes directly connectedat the feeds and with very low incident power density and withat most 20% efficiency calculated from incident power densityand total antenna area.This paper reports both single and dual linearly polarized

patch antennas with total efficiencies over 50%, includingantenna, coupling, rectification, and dc network losses. For25–200 W/cm , to the best of our knowledge, the efficienciesreported here are the highest demonstrated for these powerlevels. Due to the multiple efficiency definitions present inthe literature, it is difficult to compare the efficiency numbersdirectly. The authors feel that clarifying and standardizing theefficiency definitions is important for practical applicationsof RF energy harvesting, and an attempt of defining the mostconservative approach is given in Section IV-A.The contributions of the work presented in this paper can be

summarized as follows.• Comprehensive nonlinear rectifier experimental character-ization in good agreement with harmonic-balance simula-tions allowing prediction of an optimal dc load (Section II).

• A time-domain theoretical analysis is presented, andappears to also agree with load–pull measurements andnonlinear simulations. Time-domain analysis has beenpresented in, e.g., [13], used to predict the diode RFimpedance. In Section II-C, we use the time-domain anal-ysis to show tradeoffs needed for maximizing efficiency.

• The optimal complex antenna impedance validationmethod and dc collection circuit design method aredemonstrated on one antenna example with three differentmatching circuits (Section III). The method can be appliedto any antenna and rectifier combination in a straightfor-ward manner.

• Integrated antenna-rectifier characterization and calibra-tion is presented in Section IV, including a proposed effi-ciency definition that gives the most conservative estimateuseful for practical powering systems. We show experi-mentally that following the presented design methodologygives the highest efficiency.

II. RECTIFYING ELEMENT CHARACTERIZATION

The goal of this section is to present a method for mea-suring the nonlinear diode impedance and to accurately defineand measure rectification efficiency. The optimal compleximpedance presented to a rectifying element is a function offrequency and incident RF power

(1)

The diode impedance that results in best rectification efficiencyis, in addition, a function of dc load

(2)

The dc rectified power will be maximized for a specific load.A network analyzer can be used to measure the impedance ofthe diode directly, provided enough power range is available atthe network analyzer port and proper calibration is performed.However, there are several problems that make this measure-ment inadequate for rectifier design. These are: 1) the diodeimpedance can be found only for a specific RF pre-matchingcondition at the diode terminals; 2) rectified power trends forvarying RF load conditions cannot be obtained; 3) for differentincident power levels, the match to the diode varies, and thusthe exact power across the diode is not known; and 4) it is notstraightforward to include both a power amplifier and a vari-able dc load. Thus, a modified load–pull technique is used hereto fully characterize the rectifier element.

A. Rectifying Diode Impedance Measurements

In order to determine the optimal diode impedance for recti-fication, a Focus Microwave load–pull system is used in a mod-ified source–pull RF-to-dc configuration, as shown in Fig. 2(a).Calibration standards bring the reference plane to the diode, andthe input power is varied while directly measuring dc powerinto a variable dc load. First, rough measurements in a 50- en-vironment are used to predict the range of impedances. Oncethis is estimated, a pre-matching circuit is designed to bring theimpedance close to the range where reflections are low. Thisenhances the measurement accuracy, but it requires careful cal-ibration. Thru-reflect-line (TRL) calibration standards are fabri-cated on a Rogers 4003c substrate, with machined calibrateablefixtures that are long. In order to obtain accurate diode char-acterization, the substrate permittivity and thickness are chosenso that a 80- microstrip line is close in width to the diode

FALKENSTEIN et al.: LOW-POWER WIRELESS POWER DELIVERY 2279

Fig. 2. Block diagram of the: (a) source–pull RF-dc measurement and (b) cor-responding harmonic-balance simulations. The rectified voltage is measuredacross a variable dc load resistor while the RF power to the diode (DUT) and theimpedance presented at the diode input are varied. This is repeated for severalvalues of the dc load resistor.

leads. Effectively every impedance from the 50- environmentis transformed through the 80- line, which concentratesthe measured points at higher impedances and give an even dis-tribution on a 128- Smith chart.To obtain the impedance that needs to be presented to the

diode for most efficient rectification, the input RF poweris varied through a calibrated power amplifier. The voltageacross the dc load is measured while the input RF power,input impedance, and dc load resistance are varied at a givenfrequency.

B. Harmonic-Balance Simulations

The source–pull measurements give useful design data, butthey take a long time and need to be repeated for different con-figurations of the diodes and at different frequencies. To estab-lish a nonlinear simulation that is validated by measurements,a SPICE diode model [23] using manufacturer’s data is usedin harmonic-balance simulations in Agilent ADS, as shown inFig. 2(b). At a given input frequency, and for each input powerand dc load, the magnitude of the reflection coefficient at theport is varied from 0 to 0.95, and for each value, the angle isswept from 0 to 360 in steps of 5 , as shown via the bluepoints (in online version) in Fig. 3. In this way, constant outputdc power contours, shown in red (in online version), are ob-tained for a particular input RF power at a given frequency.Fig. 4 shows results obtained by simulations for the mis-

match between the source–pulled diode impedance and a 120-nominal impedance. The contours describe constant dc rectifiedpower (in dBm) for a range of mismatched amplitude and phase.Note that the same dc power output can be obtained for two RF

Fig. 3. Simulated constant rectified power contours at 2-dB increments at1.96 GHz for a 460- dc load resistance. The results are for a 10-dBm inputpower for a single Skyworks SMS7630-79 Schottky diode connected to an80- input line. The maximal rectified power is 7.7 dBm. In this case, the RFto dc conversion efficiency is 58%. The Smith chart is normalized to 120 .

Fig. 4. Simulated contours of constant dc power for a range of magnitudeand phase mismatch between diode impedance and reference impedance, fortwo values of input power [red and blue traces (in online version)]. The plotshows that the same rectified power can be obtained for multiple values of diodeimpedance mismatch relative to a 120- nominal impedance.

reflection coefficients, but the maximum output power is ob-tained within a magnitude range of 0.1 and a phase range of afew degrees.

C. Time-Domain Analysis

Time-domain voltage waveforms as a function of input RFvoltage and dc load and the diode I–V curve give quantitativeinsight into efficiency improvement possibilities. In [13],time-domain analysis was used to determine rectifying diodeimpedance. Fig. 5 shows the simulated I–V curve of the diode,where is the forward bias voltage, and is the reversebreakdown voltage.The simplified model of a rectifying diode is shown in

Fig. 6(a), while Fig. 6(b) shows an example input voltagewaveform across the diode terminals, as well as the voltageacross the nonlinear elements of the diode model. The dashedlines indicate the dc voltage across the load and the dc voltage


Fig. 5. I–V curve for the SMS7630 diode obtained from simulations using themodel from [23].

Fig. 6. (a) Simplified diode model. (b) Example voltage waveforms: inputvoltage across diode [red (in online version)] and voltage across nonlinearportion of the diode model [blue (in online version)]. The dashed red line (inonline version) shows the dc components of the input waveform and the blueline (in online version) is the dc component of the voltage across the nonlinearportion of the diode while it is reverse biased.

across the nonlinear part of the diode model. The voltage acrossthe nonlinear elements of the diode can be expressed as

diode offdiode on

(3)

where is the dc component and is the fundamental am-plitude during the reverse-bias period, is the forward-biasvoltage, is the forward-bias period, and is the phase shiftwith respect to the input voltage. At the transition points be-tween forward and reverse bias

(4)

andminimizing implies an increase in assuming the otherparameters do not change. The dc voltage on the load is in re-verse polarity to the forward-bias voltage . Since the mag-nitude of the reverse breakdown voltage is much largerthan the forward-bias voltage , the dc voltage can be larger

Fig. 7. Simulated time-domain voltage and current waveforms and cor-responding voltage spectra for: (a) , (b) , and(c) terminated even harmonics and for an input power of10 dBm. Note that the best efficiency is obtained for the harmonically termi-nated case when the time-domain waveform is closest to a pure sinusoid.

than . The limit on increasing the dc voltage during the re-verse-bias period is the reverse breakdown voltage . Thesum of the fundamental amplitude and the dc component

should be smaller than in order to prevent an additionalsource of harmonic generation. This means that for improvedefficiency, the diode should be in forward bias as little as pos-sible during each cycle; however, it still needs some amount offorward bias to provide the nonlinearity. The assumptions madewhile minimizing in (4) are valid for an ideal diode sinceis a constant that is determined by the diode used and is de-termined primarily by the RF impedance presented to the sourceat the fundamental frequency.In the model in Fig. 6(a), the diode can be replaced by its

Norton equivalent current source, and thus a larger impliesa larger dc output voltage and higher efficiency. For a largervalue of , the blue waveform (in online version) in Fig. 6(b)shifts upwards, and the diode is forward biased during a smallerportion of the period, thus increasing the dc rectified voltage andincreasing the efficiency. It is interesting to note the similaritiesto reduced-conduction angle efficient power amplifiers [24].Harmonic-balance simulations using ADS were performed

with a varying dc load for a constant input RF power of 10 dBm.Fig. 7(a) and (b) shows the diode voltage and current wave-forms for and 460 . The spectral content of thevoltage shows that for the optimal load, the ratio of the dc recti-fied voltage and the fundamental voltage amplitudeis small and . The efficiencies correspondingto the two loads are 41% and 52%, respectively.As in the case of power amplifiers, harmonic terminations can

be used to improve efficiency. Fig. 7(c) is the result for a high


TABLE IIEFFICIENCY SIMULATION RECTIFIER RESULTS FOR SEVERAL

INPUT POWERS. IS THE OPTIMAL LOAD

impedance presented at all even harmonics, resulting in a 65%efficiency. For this increase in efficiency, the optimal load isreduced to 360 to avoid voltage breakdown.The harmonic content of the dissipated power is similar in

all cases, but the distribution of power between the harmonicscan differ. In the optimal case, all the harmonic power will beconverted to dc.When the input power is reduced, if the load canbe adjusted to maintain , the efficiency can bemaintained. As the input power decreases further, the efficiencywill drop, as summarized in Table II. For the simulated case,the best efficiency of 70% is achieved for dBm for

.

D. Comparison of Harmonic Balance and Source–Pull

Harmonic-balance simulations are compared to source–pulldata for several cases. An example is shown in Fig. 8 for twodifferent dc loads. Over a range of dc loads from 10 to 1250and for input power levels at 0 and 10 dBm, the measured andsimulated contours track well. For both power levels and alldc loads (60 and 460 are shown in Fig. 8 as two examples),the simulated and measured contours track each other. Fig. 8(b)shows the case for the optimal dc impedance, and the antennadesigned for the RF impedance that gives the highest rectifiedpower will give the most efficiency at a given incident powerdensity.

III. ANTENNA DESIGN FOR INTEGRATION WITH RECTIFIERS

For the rectennas presented in, e.g., [25], the design involvesmatching to a 50- antenna load. The method developed in thispaper attempts to design the matching to the experimentallydetermined optimal diode impedance by antenna impedanceco-design. The remainder of this section is devoted to de-tailing the design procedure on the example of a narrowband1.96-GHz cell-phone frequency patch antenna integrated witha Schottky diode. The steps of the procedure are antenna designfor complex impedance feed point and validation of antennaimpedance performance (see Section III-A) and validation ofintegrated antenna, matching circuit, and bias line performance(see Section III-B).

A. Antenna Feed Point Design and Performance Validation

Antenna full-wave simulations (Ansoft HFSS) are used withthe goal of determining the complex feed impedance presentedto the diode for best conversion efficiency, as determined by har-monic-balance simulations or source–pull measurements. Mostantenna simulations refer to the magnitude of the reflection co-efficient, while in the rectenna design process, both the real andimaginary part of the impedance are of interest. Rather thanmatching to the standard 50 , the design attempts to obtaina match to the optimal diode complex impedance.

Fig. 8. Simulated [blue (in online version)] and measured [red (in online ver-sion)] rectified power contours for 10-dBm input power and for a(top) and (bottom) dc load at 1.96 GHz. The Smith chart is nor-malized to 120 .

Fig. 9(a) shows the geometry of a patch antenna in whichseveral feed points (labeled 1–7) and antenna widths are sim-ulated and measured in order to determine the sensitivity ofthe complex impedance to patch width, feed location, and par-asitic associated with the connector. Fig. 9(b) shows the simu-lated and measured complex impedances for one patch width

mm . The dashed line is the result of a simula-tion where a 50- coaxial feed excited with a wave port, whilethe solid line, which closely matches the experimental data, in-cludes the full 3-D SMA connector simulation. From these re-sults, it is clear that the complex impedance of the antenna isextremely sensitive to parasitics associated with the feed con-nector, even at this relatively low frequency. Notice also thatthe reactance is much more sensitive than the resistance, and aplot of would not show this sensitivity.

B. Antenna, Matching, and DC Line Design Validation

The impedance range shown in Fig. 9(b) does not exactlyreach the optimal diode impedance. There is an additional de-gree of freedom in choosing the antenna feed point and in thedesign presented here, a point 14 mm off the center of the patch


Fig. 9. (a) Geometry of patch antenna showing seven feed points for a widthof mm. (b) Simulated and measured results of the antenna compleximpedance. The dashed line shows the simulation without the full SMA con-nector implemented in HFSS. The Smith chart is normalized to 120 .

is used, it is chosen so that the matching network to the diodeis simple. In addition, simulation and measurement have excel-lent agreement at that point. Note that with other antennas anddiodes, it might be possible to eliminate the matching circuitaltogether. The next step in the design procedure is validationof the full passive part of the rectenna, including the matchingcircuit and dc output line. A series of steps are taken to vali-date the performance of the passive part of the rectenna priorto adding the diode. First, a trace from a connector to the cal-ibration reference plane where the diode will be connected isinserted (this trace is not needed after validation and can becut off). This TRL-calibrated measurement validates that theexact source–pull determined diode impedance is obtained withthe fabricated antenna and matching circuit. The next step isto add the dc collection line, which consists of a quarter-wavemicrostrip section and shunt resonant surface mount capacitorto isolate the dc from the RF. The resonant capacitor and thequarter-wave-long transformer presents an open to the diode

Fig. 10. (a) Layout of the matching circuit used to transform the antennacomplex impedance to the optimal diode complex impedance. (b) Measuredimpedance presented at the diode reference plane is within a few ohms fromthe desired complex impedance. The red data point (in online version) showsthe antenna impedance at the feed point. The red symbol (in online version)represents the impedance at the antenna feed point and the blue trace shows thetransformation due to the matching circuit. The curves connecting the measuredpoints show the matching procedure. The Smith chart is normalized to 120 .

plane while providing a dc path. The TRL calibrated measure-ment allows validation that the fundamental impedance does notchange regardless of the load connected past the resonant capac-itor. Finally, after validation the TRL trace is cut and a diode issoldered between the diode plane and ground.The specific matching circuit is shown in Fig. 10(a), the mea-

surement results are shown in Fig. 10(b) with the red data point(in online version) being the antenna feed point impedance.The blue trace (in online version) is a set of transformationsfor a multiple-section transmission line match to the desiredimpedance , as shown in the inset. The measuredimpedance is within a few ohms with a difference in reflectioncoefficient below 3%.

IV. RECTENNA CHARACTERIZATION

To validate that optimal impedance gives indeed best rec-tification, three integrated rectifier-antennas were tested. Theantenna and matching circuit are connectorized for measure-ment purposes and allow validation of each part. Additional linelength between the antenna and matching circuit move the diode


Fig. 11. Measured diode load–pull contours for rectified dc power with super-imposed impedances that antennas A1–A3 are matched to (black symbols). Thisdata is for the optimal dc load for antenna A1, and sub-optimal load for A2 andA3. The Smith chart is normalized to 120 .

match from the optimal A1 to suboptimal A2 and A3, as seenin Fig. 11. The impedances were chosen to be on dc power con-tours separated by approximately 2 dB. All three test antennas(A1–A3) use the same antenna, matching circuit and dc circuit,but they have different matching to the diode, reducing uncer-tainty due to parasitics and fabrication tolerances. For each case,the integrated antenna/rectifier was fully characterized, and theefficiencies compared.

A. Efficiency Definition

The efficiency is found from (2) by assuming that the effec-tive area of the rectenna is the largest possible, i.e., equal to thegeometric area ,

(5)

The denominator in (5) overestimates the RF power deliveredto the diode, therefore the efficiencies reported here are conser-vative lower bounds, and are precisely calibrated for normallyco-polarized incident powering waves. Other efficiency defini-tions have been reported in the literature. For example, in [21]and [26], is the RF power delivered to the diode based onthe Friis formula (6)

(6)

where , , and are the transmitter co-polarized power, gain,and distance of the transmitter, respectively. is found frommeasurement or simulation of an equivalent antenna without therectifier. Thus, this definition does not take into account the non-linear loading of the antenna by the feed, coupling between therectifier and antenna, mismatch and ohmic losses. Small errorsin have a large effect.Another definition in the literature, e.g., [18], uses measured

power density at the rectenna plane and estimates the antennaeffective area obtained through gain measurement or simulation

(7)

Fig. 12. Block diagram of measurement setup for obtaining calibrated rectifiedpower levels and efficiencies over a range of normally incident power densitiesand dc loads.

As in (6), the antenna gain is found for a fixed (usually 50 )load, and does not take in to account gain changes due to non-linear rectifier loading. A comparison of (5)–(7) for a specificrectenna is given in Section IV-C.

B. Measurements and Calibration

Antennas A1–A3 were characterized in a calibrated setup, asillustrated in Fig. 12. The source is an HP83650A synthesizerfeeding a 40-dB gain power amplifier (maximum power 30 W),allowing far-field measurements to be performed for a range ofincident power densities on the rectenna at normal incidence.The calibration procedure is performed with two equal linearpolarized calibrated AELH-1498 broadband horn antennas with

GHz dB. The power density at the plane of therectenna is found from

(8)

where is the gain of the receiving calibrated horn antennaand is the RF power measured at the receiving horn outputwhen the aperture is at the reference plane. The rectenna is nextplaced at the reference plane and the rectified power is measuredover precisely controlled dc load values for incident power den-sities from 25 to 200 W/cm . Themeasurements are performedin an anechoic chamber.

C. Results

Fig. 13(a) shows measured rectified power for the optimallymatched rectenna (A1). The optimal dc load for 200 W/cm is460 and changes by 30 for lower power levels. The corre-sponding lower bounds on peak conversion efficiencies calcu-lated from (5) are shown in Table III.This result confirms that the optimal match between the

antenna and rectifier yields considerably higher efficienciesthan the sub-optimal match cases. Fig. 13(b) shows the rectifiedoutput power for antennas A1 and sub-optimally matchedantennas A2 and A3 at two power densities. As the impedancedeviates from the optimum, the rectified power decreasessignificantly. The optimally complex-impedance matchedrectenna gives the highest rectified power. Note that the op-timal dc load shifts, as expected from the source–pull. Forpractical applications, it is important to notice that the valueof decreases with increasing incident power Fig. 14, asexpected from the discussion in Section II-C.The efficiency definition (5) reported in this study gives mea-

sured values for A1 between 43%–54% for power densities of


Fig. 13. (a) Measured rectified power for Antenna A1 at broadside for powerdensities 25–200 W/cm . (b) Antennas A1 [red dashed line (in online version)] A2 (blue dashed–dotted line (in online version)] and A3 (black solid line) atpower densities of 25 and 200 W/cm .

TABLE IIIMEASURED OPTIMAL EFFICIENCIES FOR THE THREE ANTENNAS

25–200 W/cm , as shown in blue (in online version) in Fig. 15.Compared to results obtained from (6), (7) with the same mea-sured data shows that (5) cannot overestimate the total RF–dcefficiency.

V. DISCUSSION

In summary, a design methodology for low-power integratedantenna rectifiers was presented on the example of a patch an-tenna integrated with a single Schottky diode at 1.96 GHz. Inthis section, some additional design options and practical pa-rameters are discussed. All the measurements of rectennas inthis work are done for given power densities, not transmittedpower. For example, the Federal Communications Commission(FCC) specifies an allowed transmitter power of 1 W with up

Fig. 14. Measured rectenna optimal dc load sensitivity to incident RF powerfor the three antennas.

Fig. 15. Measured efficiency of A1 using definitions (5) [blue (in online ver-sion)], (7) [red (in online version)] and (6) (black). The RF power in (7) is foundby multiplying the power density by the effective area of the antenna obtainedfrom HFSS simulations with a fixed 50- port impedance. The input power in(6) is obtained from measured power from a reference patch antenna with samegeometry as the rectenna, but matched to 50 and connected to a power meter.

to 6-dB antenna gain, the corresponding power densities will besimilar to the ones measured in the paper for a distance of upto a few meters. We have tested the system with an FCC-com-pliant industrial–scientific–medical (ISM) band transmitter withan ISM-band rectenna in [27] with ranges of several meters. Inthe example in this paper, we are using the cellular frequencyand the rectenna was intended for power scavenging close tobase stations. The presented efficiency-optimized rectenna wasmade modularly for the purpose of being able to separately val-idate all parts of the design. A more integrated version is shownin Fig. 16 along with the measured characterization curves.

A. Rectifier Topologies

The paper focuses on simulation and experiments on asingle diode rectifier. Other rectifier configurations can alsobe considered [18], [28], and two examples are shown inFig. 17. The source–pull measurements were repeated for theseconfigurations and are summarized and compared to the singlediode rectifier in Table IV. From this measured data, verified


Fig. 16. More integrated version of a dual-polarized patch rectenna at 2.45GHz(last column in Table I), where the patch antenna and rectifier circuit share aground plane. The solid blue line (in online version) and dashed red line (inonline version) are measured dc output power for the two linear polarizationsfor 175- W/cm incident power density.

Fig. 17. Three diode rectifier topologies were measured and simulated usingthe same method. (a) Single SMS7630-79 Schottky diode, described in detailthroughout this paper. (b) SMS7621-74, two-diode package. (c) Two antipar-allel SMS7630-79 diodes.

TABLE IVSUMMARY OF MEASURED MAXIMUM RECTIFIED POWER FOROPTIMAL RF AND DC IMPEDANCE AT THE DIODE TERMINALS

with simulations, a single diode gives the best efficiency for theinput power levels of interest, which, in turn, correspond to the25–200- W/cm incident power density for the example patchantenna. In (b) and (c), the losses are increased, so it takes morepower to turn both diodes on, and the diodes are most likelydifferent resulting in different bias conditions. It is likely thatfor high power levels, with well-matched diodes, two-dioderectifiers would result in higher efficiency.

B. Antenna Types

The patch antenna discussed in this paper is a good option fora narrowband powering application where the device needs to

be mounted on a structure and the ground plane of the patchgives the needed isolation. Other antennas more appropriatefor wideband powering or harvesting are spirals or capacitivelyloaded (fat) dipoles, as discussed in [22] and [29]. In caseswhere omni-directional reception is a possibility, a dipole, slot,or dipole array can be used. In the case of patches and slots, theground is convenient for placement of circuitry [27], [30].

C. DC Power Management and Powering Applications

The applications for the rectennas presented in this paper arefor low-maintenance and low-power wireless sensors that arelocated where photovoltaics (PVs) cannot be used, such as in-side a structure (e.g., in an aircraft wing [31]). This poweringmethod is appropriate for low transmit duty cycle and for caseswhen RF power density varies. In order to keep efficiency high,the on-board energy storage must be charged optimally [27].This can be accomplished by emulating an optimal load resis-tance for different power levels. In [32], a custom integratedcircuit (IC) is demonstrated for this application with 35% –70%efficiency for 1.5–30 W, respectively. In [27], a power man-agement circuit that is based on low-cost commercial compo-nents senses the available rectified power and adapts the datatransmission duty cycle accordingly with converter efficienciesof over 50% at an input power of 100 W.The powering is not very sensitive to alignment with the

RF-power transmitter, for low-gain (small) antennas; the trans-mitter used for power does not load the powering receiver sincethe two antennas are in each other’s far fields.Finally, it is important to note that the design method pre-

sented in this paper relies on the exact order of the differentsteps. The source–pull of the rectifier for varying dc load overincident RF power levels of interest must be performed first, ex-perimentally and/or in simulation. The next step is the design ofthe dc power collection circuit. Following this step, the antennacomplex impedance is designed to match the optimal rectifierimpedance. For best efficiency, this might require an additionalmatching circuit. The passive part of the rectenna is then val-idated by experiment. After the rectifier is integrated with thepassives, careful rectenna characterization for versusand is performed. This results in a Thevenin equivalentfor the rectenna, as described in Fig. 13(a). As detailed in [33],the dc power management circuit can subsequently be designedfrom this data.

ACKNOWLEDGMENT

The authors would like to thank Dr. J. Hagerty, Urban RF,Seattle, WA, for helpful discussions. The authors also thank L.Howe, University of Colorado at Boulder, for help with rectennameasurements, and Prof. R. Zane, University of Colorado atBoulder, and his graduate student D. Costinett, who are ad-dressing the power management extensions of this study.

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Erez Falkenstein (S’07), photograph and biography not available at time ofpublication.

Michael Roberg (S’10), photograph and biography not available at time of pub-lication.

Zoya Popović (F’02), photograph and biography not available at time of pub-lication.

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