outline star hft upgrade: pxl detector cmos pixel sensor requirements sensors optimization

A Reticule Size CMOS Pixel Sensor (ULTIMATE) Dedicated to the STAR HFT Upgrade

Thanh Hung PHAM

on behalf of the IPHC (Strasbourg) PICSEL group

Outline STAR HFT Upgrade: PXL detector

CMOS Pixel Sensor requirements

Sensors optimization

Recent ULTIMATE test results

Lab test and Beam test

Summary + Perspectives

IPHC [email protected] 226-30/09/2011 TWEPP 2011STARSTAR

Heavy Flavor Tracker (HFT) at STAR

HFT is an upgrade of the inner tracking system of STAR detector comprising :

SSD – Silicon Strip Detector IST – Inner Silicon Tracker PXL – Pixel Detector (2 layers at 2.5 & 8 cm)

Physical Goals : Identification of mid rapidity Charm and Beauty mesons and baryons through direct reconstruction and measurement of the displaced vertex with excellent pointing resolution

~ 150 µm

TPC SSD IST PXL~1 mm ~300 µm ~250 µm

vertex<30 µm


PIXEL SENSORS FOR HFT

Sensors Requirements Multiple scattering minimisation:

Sensors thinned to 50 µm, mounted on a flex kapton/aluminum cable

X/X0 = 0.37% per layer

Sufficient resolution to resolve the secondary decay vertices from the primary vertex

< 10 µm

Luminosity = 8 x 1027 / cm² / s at RHIC_II ~200-300 (600) hits / sensor (~4 cm2) in the

integration time window Short integration time ~< 200 µs

Low mass in the sensitive area of the detector airflow based system cooling

Work at ambient (~ 35 °C ) temperature Power consumption <~ 150 mW / cm²

Sensors positioned close (2.5 - 8 cm radii) to the interaction region

~ 150 kRad / year few 1012 Neq / cm² / year

MAPSRDObuffers/drivers

4-layer kapton cable with aluminium tracesAluminum conductor Ladder Flex Cable

Ladder with 10 MAPS sensors (~ 2×2 cm² each)

carbon fiber sector tubes

(~ 200µm thick)

Insertion from one side2 layers10 sectors 4 ladders/sector

Leo Greiner @ St Odile CMOS Workshop, Sep 2011


Main characteristics of ULTIMATE (Mimosa-28) sensor

0.35 μm process with high-resistivity epitaxial layer column // architecture with in-pixel CDS & amplification end-of-column discrimination and binary charge encoding,

followed by zero suppression logic active area: 960 columns of 928 pixels (19.9×19.2 mm²) pitch: 20.7 μm ~0.9 million pixels

charge sharing >~ σsp 3.5 μm expected tr.o. ≤ 200 μs ( ~ 5×103 frames/s)

suited to >106 part./cm²/s 2 outputs at 160 MHz ≤ 150 mW/cm² power consumption Radiation tolerant (~150 kRad/year & 3x1012 neq/cm²)

Submitted by end-January 2011

Received early April 2011


Main characteristics of ULTIMATE (Mimosa-28) sensor (suite)Based on expertise's acquired from

M26 chip for EUDET, the design of ULTIMATE has been optimized for STAR environment

Row sequencer

Minimize the delays of signals over ~2cm

8 analog outputs

(Test purpose only)

Pixel Optimization:

Radtol ~ 150 kRad/year & 3x1012Neq/cm²/year

Consumption < 150mW/cm2

Large reticule size (~2cmx2cm)

End-column 960 discriminators:

Offset compensation

Encoding & Zero suppression logic:

STAR conditionsBias current & Ref DACs

Pixels Ref Regulator &Analog Power Supply regulator (Optional)

Reduce I/O pads Programmable (Ref

Regulator)

JTAG Configuration

High data size & Rate:

2 Memories 2048x32-bits

2 Outputs at 160 MHz

I/O Pads: Powers, LVDS & Controls

PLL (Optional)


Pixel optimization

Slct_Row

16 p

ix

Slct_Gr

Slct_Row

16 p

ix

Slct_Gr

Slct_Row

Slct_Row

Slct_Row

Column-levelDiscriminator

RD

CALIB

LATCH

Slct_Row

~ 2 cm long!!!

Radiation Tolerant and Power Consumption

Enclosed layout transistor M4

Tradeoff between Power Consumption and Radiation Tolerant -> Optimization of pixels size (20.7x20.7µm²)

~2x2cm2 reticule size

Multiplex pixels output to reduce the capacitance of output nodes

Optimization of output buffer stage (transistors M7, M8 & M9) in order to drive 2cm of metal line

R ~ 1.9 KΩC ~ 4 pF

Select_GrM9

Out group

~3µA

~50µA


Digital conception challenges

2cm of row controls signal Row sequencer logic : Uniformly distributed with dispersion < 500ps

Optimization of zero suppression to cope with STAR environment Up to 9 states /row Segmented by 15 groups of 64 columns -> Symmetrical distributions of digital controls over ~2cm (at

50MHz) High density & High speed readout :~0.9 Mpix & < 200µs frame readout

2 memories of 2048x32 bits 2 outputs of 160MHz Increase frequency up to 160MHz

Layout constraint : 2261µmx19872µm The output of SRAM is serialized at 160MHz250µm

19295µm

200 ns

22

61

µm

19872 µm

Memory managementMUX

SDS

SRAM 2048 x 32 1 SRAM 2048 x 32 2Seq

Serializer

Row sequencer


On-chip Regulators

Internal Pixel References Voltages

cz

RA

RB

c1

Vbg

Vbias

Vdda

Vclamp

Mz

Msf1

Msf2

Error amplifier Serial RC network

Buffer Output stage

MpwVfb

c2

74.8 nV/√Hz @ 1 kHzNoise

1.9-2.3VOutput range

< 1mWConsumption

> 5nFCapacitive Load

0.0389 mm²Size

PSRR

Vcl

Ultimate

~2x2cm²

Ladder of 10 Ultimate sensors using external Vcl

Crosstalk between sensors through Vclp

Integrated VCL Regulator

Reduce crosstalk between sensors

Reduce material budget: no extra decoupling capacitors

52 dB @ 10 kHz

38 dB @ 1 MHz

MAPSRDObuffers/drivers

4-layer kapton cable with aluminium traces


LAB TEST RESULTS

Analogue output noise (Mode Test):

Ultimate Sensor

Temperature

Calib peak

(UADC)

ENC (e-)

CCE

Seed pixel

2x2 pixels

3x3 pixels

5x5 pixels

~20 °C 395 13.8 24% 62% 82% 94%

~35 °C 385 16.4 24% 62% 83% 96%

~45 °C 369 20.7 23% 63% 85% 99%

ENC ~ < 15 e- (On-chip reference regulator)

Gain ~ 65µV/e-

Good Noise uniformity

The CCE is very little sensitive to Temperature and Analog Power Supply variations

Conditions:

Pixel array scan at 40MHz

T = 20°C

Nominal JTAG load

Analog Power Supply (VddA) = 3.3V

Charge Collection Efficiency (Mode Test):

Analog Power Supply

Calib peak

(UADC)ENC (e-)

CCE

Seed pixel

2x2 pixels

3x3 pixels

5x5 pixels

Vdd_a = 3.3V 395 13.8 24% 63% 82% 95%

Vdd_a = 3V 390 13.9 24% 62% 83% 95%


Scan of matrices pixel and discriminator

Sub-matrix A

(Column 1-240)

Sub-matrix B

(Column 241- 480)

Sub-matrix C

Column 481 – 720)

Sub-matrix D

Column 721 -960

Temporal Noise (mV) 1 0.95 0.92 0.9

Fixed Pattern Noise (mV) 0.57 0.49 0.48 0.47

Sub-matrix ASub-matrix A


Beam Test Results (July 2011)

Conditions:

CERN-SPS 120 GeV π− beam

BT made of 6 Ultimate sensors(20µm thick epi)

T = 20°C & 30°C

ionizing radiation dose: 0&150 kRad

Analog power supply : 3V & 3.3V

Results:

Efficiency > 99.5 % with a fake hit rate << 10-4

Spatial resolution < 4 µm


Conclusion & perspectives

ULTIMATE sensors for the PXL detector of STAR HFT experiment has been designed and tested in 2011

The lab test and beam test showed : Robust regarding temperature variations Operational with analog power supply down to 3V High detection efficiency ( > 99%) with very low fake event of beam test High yield : > 90%

12 sensors fully functional 4 with 1% of death pixels

The Ultimate sensor fulfils all STAR HFT specifications

Engineering run of ULTIMATE sensor (12 wafers) is being submitted in September for equipping the engineering prototype detector

Start of run at RHIC in FY 2012

The ULTIMATE sensor development allows to accumulate expertises for future sensor designs (ALICE, AIDA, CBM, EIC, …)


BACKUP SLIDES


MIMOSA26 with high resistivity EPI layer (1)

Charge collection efficiency for the seed pixel, and for 2x2 and 3x3 pixel clusters

Signal to noise ratio for the seed pixel before irradiation and after exposure to a fluence of 6 x 1012 neq / cm²

~ 76 %~ 57 %~ 22 %20 µm

~ 91 %~ 78 %~ 31 %15 µm

~ 95 %~ 85 %~ 36 %10 µm

~ 71 %~ 54 %~21%

3x32x2seedEPI thickness

3x32x2Seed

CCE (55Fe source)

High resistivity (~400 .cm)Standard (~10 .cm) 14 µmEPI layer

(a)

EPI thick

10.7

After 6x1012 neq/cm²Before irradiation

--------

28

22


~ 3620 µm

~ 4115 µm

~ 3510 µm~ 20

(230 e-/11.6 e-)

S/N at seed pixel

(106Ru source)


(b)

~ 76 %~ 57 %~ 22 %20 µm

~ 91 %~ 78 %~ 31 %15 µm

~ 95 %~ 85 %~ 36 %10 µm

~ 71 %~ 54 %~21%

3x32x2seedEPI thickness

3x32x2Seed

CCE (55Fe source)


(a)

EPI thick

10.7


--------

28

22


~ 3620 µm

~ 4115 µm

~ 3510 µm~ 20

(230 e-/11.6 e-)

S/N at seed pixel

(106Ru source)


(b)Christine HU@TWEPP 2010

outline star hft upgrade: pxl detector cmos pixel sensor requirements sensors optimization

Documents

pixels size

star environmentup

star environment row

detector airflow

sensor suitebased

output of sram

design of ultimate

ps optimization