recall: arithmetic -- addition eng2410 digital design...

School of Engineering 1

ENG2410Digital Design

“Arithmetic Circuits”

Fall 2017S. Areibi

School of EngineeringUniversity of Guelph

2

Topics

� Binary Adders

� Binary Ripple Carry Adder

� 1’s and 2’s Complement

� Binary Subtraction

� Binary Adder-Subtractors

� Binary Multipliers

� BCD Arithmetic

3

Resources

� Chapter #5, Mano Sections� 5.2 Binary Adders

� 5.3 Binary Subtraction

� 5.4 Binary Adders-Subtractors

� 5.5 Binary Multiplications

� 5.7 HDL Representations -- VHDL

4

Recall: Arithmetic -- addition

Binary addition is similar to decimal arithmetic

+ 10001

00110

1 1 1 0 1

No carries 1 0 1 1 0 0

1 0 1 1 0

+ 1 0 1 1 1

1 0 1 1 0 1

Carries

Remember: 1+1 is 2 (or (10)2), which results in a carry1+1+1 is 3 (or (11)2) which also results in a carry

5

Half Adder (One bit adder)

o S = XY’ + X’Y

= X ⊕ Y

o C = X.Y

6

Full Adder

o Three inputs: � X� Y� Third is C in � Z

o Two outputs: � Sum� Cout

S

Full Adder

x y

ZCout

Implementation?


7

Straight Forward Implementation:

� What is this?

Z

S

K Map for S

8

YZXZXYC ++=

Y

X

Z

Y

Z

X

C

Straight Forward Implementation:

K Map for C

9

Implementation Issues

o If we try to implement the Optimized Boolean functions directly we will need how many gates?� Seven AND gates and two OR Gates !!

o Can we do better?o YES!!

� Share Logic � Hierarchical Design.

YZXZXYC ++=

10

Any Alternatives?

o Try to make use of hierarchy to design a 1-bit full adder from two half adders.

o Also, try to share logic between the Sum output and Carry output.

� Half Adder

S = X ⊕ Y

C = XY

� Full Adder

S = X ⊕ Y ⊕ Z

C = XY + XZ + YZ

11

A Different Way to Represent C

1

1 1 1

X

YZ

0

1

00 01 11 10

XY

XYZ

XYZ

C = XY + XYZ + XYZ

C = XY + Z (XY + XY)

12

Two Half Adders (and an OR)

How many Gates do we need?

Full Adder

x y

ZC

S


13

Binary Ripple-Carry Adder

� A Parallel binary adder is a digital circuit that produces the arithmetic sum of two binary numbers using only combinational logic.

� The parallel adder uses “n” full adders in parallel, with all input bits applied simultaneously to produce the sum.

� The full adders are connected in cascade, with the carry output from one full adder connected to the carry input of the next full adder.

14

Binary Ripple-Carry Adder

� Straightforward – connect full adders

� Carry-out to carry-in chain

� C0 in case this is part of larger chain, maybe just set to zero

15

Hierarchical 4-Bit Adder

We can easily use hierarchy here1. Design half adder2. Use TWO half adders to create full adder3. Use FOUR full adders to create 4-bit adder

VHDL CODE?

16

VHDL Half Adder (DATA FLOW)

entity half_adder is

port (x_ha,y_ha: in std_logic;

s_ha,c_ha: out std_logic);

end half_adder;

architecture dataflow of half_adder is

begin

s_ha <= x_ha xor y_ha;

c_ha <= x_ha and y_ha;

end dataflow

17

VHDL Full Adder (Structural)

entity full_adder is

port (x_fa, y_fa, z_fa: in std_logic;

s_fa, c_fa: out std_logic);

end full_adder;

architecture struc_dataflow of full_adder ishs

hc

tc

component half_adder

port (x_ha, y_ha : in std_logic;

s_ha, c_ha : out std_logic);

end component;

signal hs, hc, tc: std_logic;

begin

HA1: half_adder

port map (x_fa, y_fa, hs, hc);

HA2: half_adder

port map (hs, z_fa, s_fa, tc);

c_fa <= tc or hc;

end struc_dataflow

18

Any Problems with this Design?

� Delay� Approx how much?

� Imagine a 64-bit adder� Look at carry chain


19

Carry Propagation & Delay

� One problem with the addition of binary numbers is the length of time to propagate the ripple carry from the least significant bit to the most significant bit.

� The gate-level propagation path for a 4-bit ripple carry adder of the last example:

� Note: The "long path" is from A0 or B0 through the circuit to S3.

A3

B3

S3

B2

S2

B1

S1

S0

B0

A2

A1

A0

C4

C3 C

2 C1 C

0

20

Recall: Binary Coded Decimal

�Binary Coded Decimal (BCD)

● Each Decimal Digit is represented by 4 bits

● (0 – 9) � Valid combinations

● (10 – 15) � Invalid combinations

Decimal BCD0 0 0 0 01 0 0 0 12 0 0 1 03 0 0 1 14 0 1 0 05 0 1 0 16 0 1 1 07 0 1 1 18 1 0 0 09 1 0 0 1

21

BCD Addition

One decimal digit + one decimal digit

● If the result is 1 decimal digit ( ≤ 9 ), then it is a simple binary addition

Example:

● If the result is two decimal digits ( ≥ 10 ), then binary addition gives invalid combinations

Example:

5

+ 3

8

0 1 0 1

+ 0 0 1 1

1 0 0 0

5

+ 5

1 0

0 1 0 1

+ 0 1 0 1

1 0 1 00 0 0 1 0 0 0 0

22

BCD AdditionIf the binary resultis greater than 9,correct the result byadding a “6”

5

+ 5

1 0

0 1 0 1

+ 0 1 0 1

1 0 1 0

+ 0 1 1 0

0 0 0 1 0 0 0 0

Two Decimal Digits

Multiple Decimal Digits

3 5 1

0 0 1 1 0 1 0 1 0 0 0 1

23

BCD Addition

�Four binary digits count up to 15 (1111) but in BCD we only use the representations up to 9 (1001).

�The difference between 15 and 9 is 6. If you want 9+1 to produce 10, which is 1 0000, you have to add 6 to make 1010 wrap to 1 0000.

� It is done to skip the six invalid states of binary coded decimal i.e from 10 to 15 and again return to the BCD codes.

ENG241/Digital Design 24

BCD Arithmetic

8 1000 Eight+5 +0101 Plus Five 13 1101 is 13 (> 9)

� Note that the result is MORE THAN 9, so must berepresented by two digits!

� To correct the digit, add 6 1000 Eight8

+5 +0101 Plus 5 13 1101 is 13 (> 9)

+0110 so add 6carry = 1 0011 leaving 3 + cy

0001 | 0011 Final answer (two digits)

24


25

BCD Addition Circuit

� Design a BCD Adder that adds two BCD digits.

� Constraints:

� Use 4-bit Binary Adders

� Hints:

� A detection circuit that detects invalid BCD digits will need to be designed.

ENG241/Digital Design 26

BCD Addition

4-bit binary adder

Addend Augend

Input

Carry

4-bit binary adder

BCD Sum

0 or 6

DetectionCircuit for

Invalid BCDOutput

Carry

26

Add 0 if result is validAdd 6 if result is invalid

BCD # 1 BCD # 2

27

BCD Addition1 0 1 0

1 0 1 1

1 1 0 0

1 1 0 1

1 1 1 0

1 1 1 1

Z3 Z2 Z1 Z0

28

Binary Subtraction

�Borrow a “Base” when needed

0 0 1110

1111 0−

0101 1 10

= (10)22

2

2 2

1

000

1

= (77) 10

= (23) 10

= (54) 10

Subtraction

� We managed to design an Adder easily.

� For subtraction, we will also need to design a Subtractor!!

� Can we perform subtraction using the Adder Circuit we designed earlier?

� YES, we can use the concept of Complements.

� X = Y – Z � X = Y + complement(Z)

29

Complements?

� There are two types of complements for each base-r system

� The radix complement, the (r’s) complement.

� The diminished radix complement, (r-1)’s comp.

� For Decimal System

� 10’s complement


� For Binary Systems



30


Complements of Decimal System

� The 9’s complement of a decimal number is obtained by subtracting each digit from 9.

� Example: The 9’s complement of 546700 is

� 999999 – 546700 = 453299

� The 10’s complement is obtained by adding 1 to the 9’s complement:

� Example: The 10’s complement of 546700 is

� 999999 – 546700 = 453299 + 1 = 453300

� Or, 1000000 – 546700 = 453300

� Or, leave all least significant 0’s unchanged, subtract the first nonzero LSD from 10, and subtract all higher significant digits from 9.

31

Unsigned Decimal Subtraction

72532 – 3250 = 69282

� Use 10’s complement to perform the subtraction

� M = 72532 (5-digits), N = 3250 (4-digits)

� Since N has only 4 digits append a zero N=03250

� What is the 10’s complement of N (03250) ?

� 99999 – 03250 = 96749 + 1 = 96750

� Now add M to the 10’s comp of N

� 72532 + 96750 = 169282 (carry occurred)

� The occurrence of the end carry indicates that M > N� Discard end carry (169282 – 100000 = 69282)

32

Example #1

3250 - 72532 = - 69282 (HOW??)

Compare the numbers, exchange their positions, …

� Use 10’s complement to perform the subtraction

� M = 3250 (4-digits), N = 72532 (5-digits)

� Since M has only 4 digits append a zero M=03250

� What is the 10’s complement of N (72532)?

� 99999 – 72532 = 27467 + 1 = 27468

� Now add M to the 10’s comp of N

� 03250 + 27468 = 30718 (There is no end carry!)

� No end carry indicates that M < N (make correction!!)

� Answer: -(10’s complement of 30718) = -69282

33

Unsigned Decimal Subtraction

Example #2

34

Binary Subtraction

We’ll use unsigned subtraction to motivate use of complemented

representation

35

1’s Complement

�1’s Complement (Diminished RadixComplement)

● All ‘0’s become ‘1’s

● All ‘1’s become ‘0’s

Example (10110000)2

� (01001111)2

If you add a number and its 1’s complement …???

1 0 1 1 0 0 0 0

+ 0 1 0 0 1 1 1 1

1 1 1 1 1 1 1 1

36

1’s Complement: Example

Notice that the 1’s complement of the number 10101010 can be obtained by complementing each bit

2n - 1 1 1 1 1 1 1 1

- N 0 1 0 1 0 1 0

1’s Compl. 1 0 1 0 1 0 1

1 0 1 0 1 0 1 0

0 1 0 1 0 1 0 1


37

2’s Complement

�2’s Complement (Radix Complement)

● Take 1’s complement then add 1

● Toggle all bits to the left of the first ‘1’ from the right

Example:

Number:

1’s Comp.:

0 1 0 1 0 0 0 0

1 0 1 1 0 0 0 0

0 1 0 0 1 1 1 1

+ 1

OR

1 0 1 1 0 0 0 0

00001010

38

2’s Complement: Example

Notice that the 2’s complement of the number 011001 can be obtained by complementing each bit and adding 1.

2n 1 0 0 0 0 0 0

- N 0 1 1 0 0 1

1’s Comp 1 0 0 1 1 0

2’s Compl. 1 0 0 1 1 1

39

Example: Incorrect Result

Borrow 1 1 1 0 0

(M) Minuend 1 0 0 1 1

(N) Subtrahend - 1 1 1 1 0

Difference 1 0 1 0 1

19 – 30 = 21 !!!!!

Incorrect Result!!

Minuend is smaller than Subtrahend

How can we know if the result is incorrect? How to fix the problem?

40

Example

Borrow 1 1 1 0 0

(M) Minuend 1 0 0 1 1

(N) Subtrahend - 1 1 1 1 0

Difference 1 0 1 0 1

Correct Diff - 0 1 0 1 1

If no borrow, then result is non-negative (minuend >= subtrahend).

Since there is borrow, result must be negative.

The result must be corrected to a negative number.

19 – 30 = -11

Procedure?

41

Algorithm: Subtraction of two n-digit Numbers M-N can be done as follows

1. Subtract N from M

If no borrow, then M ≥ N and result is OK

! Else, N > M so result must be subtracted from 2n and a minus sign should be

appended

2. NOTE: Subtraction of a binary number from 2n to obtain an n-digit result is called 2’s complement

3. Circuit?

42

Adder/Subtractor Circuit!!

Binary Adder Binary Subtractor

EXPENSIVE!!


43

How to get rid of Subtraction Operation?

Use complements of numbers to replace the subtraction operation with addition only.

AnyIdea?

44

Subtraction of Unsigned NumbersUsing Complements

1. M – N Equivalent to M + (2’s complement of N)

2. Add (2’s complement of N) to M

� This is M + (2n – N) = M – N + 2n

� Notice we are using addition to achieve subtraction.

3. If M ≥ N, will generate carry!

• Result is correct � Simply discard carry

• Result is positive M - N

4. If M < N, no end carry will be generated!

• Make Correction � Take 2’s complement of result

• Place minus sign in front

45

Example

o X = 1010100 minus Y = 1000011

o Notice that X > Y

o The 2’s complement of Y=1000011is obtained first by getting the 1’s complement � 0111100 and then adding 1 � (0111101)

X 1 0 1 0 1 0 0

+ 2’s comp Y 0 1 1 1 1 0 1

Sum 1 0 0 1 0 0 0 1

46

Example 2

� Y = 1000011 minus X = 1010100

� Notice Y < X

� No end carry

� Answer: - (2’s complement of Sum)

� - 0010001

Y 1 0 0 0 0 1 1

+ 2’s comp X 0 1 0 1 1 0 0

Sum 1 1 0 1 1 1 1

We said numbers are unsigned. What does this mean?

47

Adder-Subtractor

I. By using 2’s complement approach we were able to get rid of the design of a subtractor.

II. Need only adder and complementer for input to subtract

III. Need selective complementer to make negative output back from 2’s complement

48

Selective 1’s Complementer?

ControlWhen X = 0 we transfer Y to output

When X = 1 we complement Y

Control

0 1


49

Design

Inverts each bit of B if S is 1

Adds 1 to make 2’s complement

S low for add,high for subtract0 1

S B In

0 0 0

0 1 1

1 0 1

1 1 0

Subtraction of Unsigned Numbers Using Complements

Selective 1’s Complementer

50

Negative Numbers

�Computers Represent Information in ‘0’s and ‘1’s

● ‘+’ and ‘−’ signs have to be represented in ‘0’s and ‘1’s

�3 Systems

● Signed Magnitude

● 1’s Complement

● 2’s Complement

All three use the left-most bitto represent the sign:

♦ ‘0’ � positive

♦ ‘1’ � negative

51

Signed Binary Numbers

� First review signed representations

� Signed magnitude

� Left bit is sign, 0 positive, 1 negative

� Other bits are number

0 0001001 � +9

1 0001001 � -9



52

Signed Magnitude Representation

�Magnitude is magnitude, does not change with sign

(+3)10 � ( 0 0 1 1 )2

(−3)10 � ( 1 0 1 1 )2

Sign Magnitude

S Magnitude (Binary)

53

1’s Complement Representation

�Positive numbers are represented in “Binary”

�Negative numbers are represented in “1’s Comp.”

(+3)10 � (0 011)2

(−3)10 � (1 100)2

�There are 2 representations for ‘0’!!!!!!

(+0)10 � (0 000)2

(−0)10 � (1 111)2

0 Magnitude (Binary)

1 Code (1’s Comp.)

54

1’s Complement Range

�4-Bit Representation

24 = 16 Combinations

− 7 ≤ Number ≤ + 7

−23+1 ≤ Number ≤ +23 − 1

�n-Bit Representation

−2n−1+1 ≤ Number ≤ +2n−1 − 1

Decimal 1’s Comp.+ 7 0 1 1 1+ 6 0 1 1 0+ 5 0 1 0 1+ 4 0 1 0 0+ 3 0 0 1 1+ 2 0 0 1 0+ 1 0 0 0 1+ 0 0 0 0 0− 0 1 1 1 1− 1 1 1 1 0− 2 1 1 0 1− 3 1 1 0 0− 4 1 0 1 1− 5 1 0 1 0− 6 1 0 0 1− 7 1 0 0 0


55

2’s Complement Representation

�Positive numbers are represented in “Binary”

�Negative numbers are represented in “2’s Comp.”

(+3)10 � (0 011)2

(−3)10 � (1 101)2

�There is 1 representation for ‘0’

(+0)10 � (0 000)2

(−0)10 � (0 000)2

0 Magnitude (Binary)

1 Code (2’s Comp.)

1’s Comp. 1 1 1 1

+ 1

1 0 0 0 0

56

2’s Complement Range

�4-Bit Representation

24 = 16 Combinations

− 8 ≤ Number ≤ + 7

−23≤ Number ≤ + 23 − 1

�n-Bit Representation

−2n−1≤ Number ≤ + 2n−1 − 1

Decimal 2’s Comp.+ 7 0 1 1 1+ 6 0 1 1 0+ 5 0 1 0 1+ 4 0 1 0 0+ 3 0 0 1 1+ 2 0 0 1 0+ 1 0 0 0 1+ 0 0 0 0 0− 1 1 1 1 1− 2 1 1 1 0− 3 1 1 0 1− 4 1 1 0 0− 5 1 0 1 1− 6 1 0 1 0− 7 1 0 0 1− 8 1 0 0 0

57

Convert 2’s Complement to Decimal

bit index 7 6 5 4 3 2 1 0

bit weighting -27 26 25 24 23 22 21 20

Example 0 1 0 1 0 0 1 0

Decimal 0x-27 1x26 0x25 1x24 0x23 0x22 1x21 0x20

64 + 16 + 2 = 82

bit index 7 6 5 4 3 2 1 0

bit weighting -27 26 25 24 23 22 21 20

Example 1 0 1 0 1 1 1 0

Decimal 1x-27 0x26 1x25 0x24 1x23 1x22 1x21 0x20

-128 + 32 + 8 + 4 + 2 = -82

58

Number Representations

�4-Bit Example

Unsigned Binary

Signed Magnitude

1’s Comp. 2’s Comp.

Range 0 ≤ N ≤ 15 -7 ≤ N ≤ +7 -7 ≤ N ≤ +7 -8 ≤ N ≤ +7

PositiveBinary Binary Binary Binary

Negative XBinary 1’s Comp. 2’s Comp.

0 0 0

1 1 1

59

Example in 8-bit byte

� Represent +9 in different ways

Signed magnitude 00001001

1’s Complement 00001001


� Represent -9 in different ways

Signed magnitude 10001001



The

Same!

60

Observations

� All positive numbers are the same

� 1’s Comp and Signed Mag have two zeros

� 2’s Comp has more negative than positive

� All negative numbers have 1 in high-order bit


61

Advantages/Disadvantages

Signed magnitude has problem that we need to correct after subtraction

One’s complement has a positive and negative zero

☺ Two’s complement is most popular

� i.e arithmetic operations are easy

62


�Magnitude is magnitude, does not change with sign

(+3)10 � ( 0 0 1 1 )2

(−3)10 � ( 1 0 1 1 )2

�Can’t include the sign bit in ‘Addition’0 0 1 1 � (+3)10

+ 1 0 1 1 � (−3)10

1 1 1 0 � (−6)10

Sign Magnitude

S Magnitude (Binary)

63


� The signed-magnitude system is used in ordinary arithmetic, but is awkward when employed in computer arithmetic (Why?)

1. We have to separately handle the sign

2. Perform the correction if necessary!!

� Therefore the signed complement (1’s complement and 2’s complement number representations) is normally used.

64

Signed Magnitude Arithmetic

� Complex Rules!!

� The addition of two numbers M+N in the sign magnitude system follows the rules of ordinary arithmetic:

� If the signs are the same, we add the two magnitudes and give the sum the sign of M.

� If the signs are different, we subtract the magnitude of N from the magnitude of M.

� The absence or presence of an end borrow then determines:

� The sign of the result.

� Whether or not a correction is performed.

� Example: (0 0011001) + (1 0100101)

� 0011001 – 0100101 = 1110100

� End borrow of 1 occurs, � M < N!!

� Sign of result should be that of N,

� Also correct result by taking the 2’s complement of result

65

Binary Subtraction Using 1’s Comp. Addition

�Change “Subtraction” to “ Addition”

� If “ Carry” = 1then add it to theLSB, and the resultis positive(in Binary)

� If “ Carry” = 0then the resultis negative(in 1’s Comp.)

0 1 0 1

+ 1 1 1 0

(5)10 – (1)10

(+5)10 + (-1)10

0 0 1 1+

0 1 0 0

0 1 0 1

+ 1 0 0 1

(5)10 – (6)10

(+5)10 + (-6)10

0 1 1 1 0

1 1 1 0

+ 4 − 1

1

66

Two’s Complement

� To Add:� Easy on any combination of positive

and negative numbers

� To subtract:� Also easy!

� Take 2’s complement of subtrahend

� Add

� This performs A + ( -B), same as A – B


67

Binary Subtraction Using 2’s Comp. Addition

�Change “Subtraction” to “ Addition”

� If “ Carry” = 1ignore it, and the result is positive(in Binary)

� If “ Carry” = 0then the resultis negative(in 2’s Comp.)

0 1 0 1

+ 1 1 1 1

(5)10 – (1)10

(+5)10 + (-1)10

1 01 0 0

0 1 0 1

+ 1 0 1 0

(5)10 – (6)10

(+5)10 + (-6)10

0 1 1 1 1

+ 4 − 1

68

Examples from Book

� Addition

� (+6) + 13

� (-6) + 13

� (+6) + (- 13)

� (-6) + (-13)

� Subtraction

� (-6) - (-13)

� (+6) - (-13)

The numbers below should be in 2’s comp representation

69

Addition of Two Positive Numbers

� Addition

� (+6) + 13 = +19

00000110 � +6

+00001101 � +13

--------------

00010011 � +19

� If a carry out appears it should be discarded.

70

Addition of :a Positive and Negative Numbers

� Addition

� (-6) + 13 = +7

11111010 (this is 2’s comp of +6)

+00001101

--------------

1 00000111

� The carry out was discarded

71

Subtraction of Two Numbers

� The subtraction of two signed binary numbers (when negative numbers are in 2’s complement form) can be accomplished as follows:1. Take the 2’s complement of the subtrahend

(including the sign bit)

2. Add it to the minuend.

3. A Carry out of the sign bit position is discarded.

72

Subtraction of Two Numbers

� Subtraction� (+6) – (+13) = -7

00000110 00000110

- 00001101 � + 11110011 (2’s comp)

-------------- -----------

11111001

� What is 11111001?

Take its 2’s complement=> 00000111

The magnitude is 7

So it must be -7


73

Circuit for 2’s complement Numbers

� No Correction is needed if the signed numbers are in 2’s complement representation

74

Sign Extension

� Sign extension is the operation, in computer arithmetic, of increasing the number of bits of a binary number while preserving the number’s sign (positive/negative) and value.

� This is done by appending digits to the most significant side of the number

� Examples:

� 2’s complement (6-bits � 8-bits)� 00 1010 � 0000 1010

� 2’s complement (5-bits � 8-bits):� 10001 � 1111 0001

75

Overflow

� In order to obtain a correct answer when adding and subtracting, we must ensurethat the result has a sufficient number of bits to accommodate the sum.

� If we start with two n-bit numbers and we end up with a number that is n+1 bits, we say an overflow has occurred.

76

Overflow

� Two cases of overflow for addition of signed numbers

� Two large positive numbers overflow into

sign bit

� Not enough room for result

� Two large negative numbers added

� Same – not enough bits

� Carry out can be OK

77

Examples

� Two signed numbers +70 and +80 are stored in 8-bit registers.

� The range of binary numbers, expressed in decimal, that each register can accommodate is

from +127 to -128.

� Since the sum of the two stored numbers is 150, it exceeds the capacity of an 8-bit register.

� The same applies for -70 and -80.

78

Overflow Detection

Carries: 0 1 Carries: 1 0+70 0 1000110 -70 1 0111010+80 0 1010000 -80 1 0110000

------ ------------- ---- -------------+150 1 0010110 -150 0 1101010

1. The addition of +70 and +80 resulted in a negative number!

2. The addition of -70 and -80 also resulted in an incorrect value which is positive number!

3. An overflow condition can be detected by observing the carry into the sign bit position and the carry out of the sign bit position.

4. If the the carry in and carry out of the sign bit are not equal an overflow has occurred.


79

Circuit for Overflow Detection

Condition is that either Cn-1 or Cn is high, but not both

80

Binary Multiplication

�Bit by bit

01 1 1 1

01 1 0

00 0 0 0

01 1 1 1

01 1 1 1

0 0 000

0110111 0

x

81

Binary Multiplication: Example II

1 0 1 1

0 0 0 0

1 0 1 1

1 1 0 1 1 1

1 0 1 1

X 1 0 1

What type of logic circuit do we need to

perform Binary Multiplication?

82

Multiplier

� Multiply by doing single-bit multiplies and shifts

� Combinational circuit to accomplish this?

The value of A0B0

Will either be 0 or 1

What type of gatecan we use?

83

Combinational Multiplier

AND computes A0 B0

Half adder computes sum. Will need FA for larger multiplier.

84

Larger Multiplier: Resources

For J multiplier bits and K multiplicand bits we need

o J x K � AND gates

o (J-1) K-bit � adders to produce a

product of J+K bits.


85

Larger Multiplier

A k=4-bit by j=3-bit Binary Multiplier.

J = 3 (Multiplier)

K = 4 (Multiplicand)

Jxk = 12 AND Gates

(J-1) Adders

Of k bits each

recall: arithmetic -- addition eng2410 digital design...

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