1) Draw the transistor level schematic (CMOS) and stick diagram for the following: a) 3 input NAND gate b) 3 input NOR gate c) A+B(C+D+E) d) AB + CD +EF

SOLUTION

a) 3-input NAND Gate The schematic view of the 3-input NAND Gate is shown below. The arrows represent the Euler Path, which is useful to construct the Stick diagram.

In the PUN we start from transistor C and especially from its drain that is connected to the output. So, in the stick diagram below we connect the leftmost contact to the output metal line. Following the arrow, we reach the source of transistor C that is connected to Vdd. So, in the Stick Diagram, we connect the right contact of C to the Vdd line. Following the arrow we reach the source of B that is connected to Vdd. So, the area between C and B are the source of both transistors. Next, we reach the drain of B that should be connected to the output metal line. Still following the arrow, we reach the drain of transistor A that is connected to output metal line too. So, we choose the area between A and B to be

the drain of both transistors. Therefore, the right contact of A is its source and it is connected to the Vdd metal line.

Stick Diagram of NAND3

b) 3-input NOR GATE Again, in the NOR3 schematic, the arrows represent the Euler paths.

The corresponding stick diagram of NOR3 gate is shown below.

Stick Diagram of NOR3

c) A+B(C+D+E) __________ We are going to implement the function A+B(C+D+E), and then just add an inverter whose input will be the output of this function. Inverter’s stick diagram is shown at the end. Again, in the schematic, the arrows represent the Euler paths. It is an alternative way instead of designing a distinct graph in order to find the Euler path. It is very important that in PDN and PUN transistors are being accessed in the same order.

Note that we need two different types of metal when different metal layers overlap. Here, we used the notation metal and metal2 to identify each one of them.

Stick Diagram of function A+B(C+D+E)

d) AB + CD +EF

___________ We are going to implement the function (AB)+(CD)+(EF), and then just add an inverter whose input will be the output of this function. Inverter’s stick diagram is shown at the end. We cannot find an Euler Path for that gate. So, our stick diagram should have a gap in the n-diffusion.

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Stick Diagram of function (A+B)(C+D)(E+F)

Stick diagram of Inverter.