week$9.1$sequen,al$circuits$ design$and$analysis$pami.uwaterloo.ca/~basir/ece124/week9-1.pdf ·...

Week 9.1 Sequen,al Circuits Design and Analysis

ECE124 Digital Circuits and Systems


Synchronous circuit analysis

o  Given a circuit (containing combina,onal logic and flip-‐flops), synchronous circuit analysis involves figuring out what the circuit is doing. n  i.e., How does the circuit transi,on from state to state as clock edges arrive?

What are the circuit outputs?

o  In effect, the analysis involves figuring out the state table and/or state diagram associated with a provided circuit.


Analysis procedure

o  The basic procedure involves the following: n  Iden%fy the flip-‐flops used to hold the current state informa,on. n  Iden%fy the outputs of the circuit. n  Write down the logic equa%ons for the circuit outputs and the flip-‐flop inputs

(these are the next state equa,ons). n  Use logic equa,ons to derive a state table which describes the next state and

circuit outputs. n  Obtain a state diagram from the state table.

o  It is the state table and/or state diagram that specifies the behavior of the circuit.

o  Notes: the flip-‐flop input equa%ons are some,mes called the excita%on equa%ons.


Analysis example (observa,ons)

o  Derive a state table and state diagram for the following circuit.

T Q

R

J Q

K R

AB

Q1

Q0

Z

o  Observa,ons: n  The circuit has two inputs A and B, one output Z (it happens that the output is

equal to one of the flip flop outputs). n  The circuit has two flip-‐flops (different types) with outputs Q0 and Q1 (This

implies that there are as many as 4 different states in the circuit, namely Q0Q1 = 00, 01, 11, 10).


Analysis example (flip-‐flop input equa,ons and output equa,ons)

T Q

R

J Q

K R

AB

Q1

Q0

Z

o  We write down logic expressions for the flip-‐flop inputs and the circuit outputs in terms of the circuit inputs and the current state signals (flip-‐flop outputs).

o  Our goal is to determine the next state values!!! Hence, we need to know the flip-‐flop input equaAons AND the behaviour of the flip-‐flops (i.e., how they work).


Analysis example (state table) (1)

o  Using the FF input equa,ons, we can build a table showing the FF inputs (this is the first step in crea,ng the state table):



o  We now have the FF input values, and know the FF behaviour (for both JKFF and TFF):

o  We can then determine the next FF output values:



o  We can (finally) write the next state informa,on and the output values (based on current state and input values) in the state table format:

o  Observa,on: The output Z (in this example) is only a func,on of the current state; it does not depend on the inputs.


Alterna,ve representa,on for a state table

o  We can also write the state table in a slightly different (tabular) format if we choose. The informa,on presented is the same.


Synchronous circuit design

o  Design: Given a verbal descrip,on of the opera,on that a circuit must perform, come up with an circuit implementa,on.

o  Procedure: n  Understand the verbal descrip,on of the problem. n  Create a state diagram and/or a state table (at this point, states might have only

symbolic names). n  Try to reduce the number of required states (state reduc,ons). This might result

in a circuit with less flip-‐flops. n  Since states are symbolic, assign unique binary values to represent each state

(state assignment). n  Select a flip-‐flop types (DFF, TFF, JKFF) to store the state informa,on (current

state). n  Derive simplified output equa,ons. n  Derive the next-‐state/flip-‐flop input equa,ons. n  Draw a schema,c of the resul,ng circuit.


Example (1)

o  We will illustrate the design procedure by doing an example. Then, we will go back an inves,gate alterna,ve choices we could have made at various steps.

o  Consider the following verbal problem descrip,on:

n  A vending machine dispenses a package of gum which costs 15 cents. The machine has a single slot that accepts nickels and dimes only and a sensor indicates the type of coin deposited. Make a controller that sends a signal to a chute release once enough change has been deposited. Note that the machine does not give change or credits.

o  GeHng from the verbal problem descripAon to a state diagram and/or a state table is likely the hardest part of the design procedure. Try to think in a methodical way, possibly building up the state diagram from individual pieces.


Example (2)

o  We can illustrate the verbal problem descrip,on as a block diagram.

coinsensor

vendingmachinecontrol

chuterelease

mechanism

n

drelease

reset clk

o  Our controller has two inputs, n and d, to indicate the coin deposited. It also has a clock and a reset input. It produces one output, release, once enough change has been deposited.


Example (3)

o  We can make some observa,ons about the problem:

n  Once 15 or more cents has been deposited we assert the release signal so the gum is dispensed.

n  When a nickel is deposited, n is set to 1.

n  When a dime is deposited, d is set to 1.

n  Inputs n or d are both 0 when no coin deposited.

n  Both n and d are never set to 1 simultaneously.


Example (4)

o  We need to detect sequences of deposited nickels and dimes that add up to >= 15 cents.

0c

5c

10c

15c

n

n

n

0c

5c

10c

n

n

d

20c

0c

5c

15c

n

d

0c

10c

15c

d

n

0c

10c

d

d

20c

o  It then makes sense to define a state and “the amount of money deposited so far.”

o  We can then draw a state diagram by merging the different sequences of deposited coins together.


Example (5)

o  We can draw the state diagram:

o  Note that the states are symbolic (e.g., “S0” represents “0 cents deposited so far”, “S1” representes “5 cents deposited so far”, “S2” represents “10 cents deposited so far”, and “S3” represents >= 15 cents deposited”).

S0/0 S1/0 S2/0 S3/1

0c 5c 10c >= 15c

n=1 n=1 n=1 + d=1

d=1

d=1

n=0 & d=0 n=0 & d=0

n=0 & d=0

reset


Example (6)

o  From the state diagram, we can write the state table (in terms of symbolic states).


Example (7)

o  Presently, our states have symbolic names (S0, S1, etc.) and we need to encode them as bit strings. How should we do the encoding? n  How many bits we chose for the encoding influences the number of flip-‐flops

required. n  How we assign binary paferns to states can influence the complexity of the flip-‐

flop input equa,ons. n  Etc…

o  In our example, we have 4 states, so we need a minimum of 2 bits to encode the states (and therefore a minimum of 2 flip-‐flops). We can use the following encoding: n  S0 <-‐> 00, S1 <-‐> 01, S2 <-‐> 10, S3 <-‐> 11


Example (8)

o  With binary codes assigned, we can redo our state table with binary values instead of symbolic names:


Example (9)

o  Need to select a type of flip-‐flop to serve as the storage element for the state informa,on and to hold the current state informa,on.

o  We can consider different possibili,es, including DFF, TFF and JKFF.

o  The selec,on of flip-‐flop type will influence the complexity of the logic required to generate the flip-‐flop input equa,ons (i.e., the complexity of the next state logic).


Example (10)

o  For our example, we will chose DFF.

o  With DFF, the output Q(t+1) equals input D(t) once the ac,ve clock edge arrives.

o  So, DFF are convenient in that the FF input equaAons only need to produce the encoding of the next state!!! n  I.e., the DFF input equa,ons should be equal to the next state informa,on in the

state table!!!


Example (11)

00 01 11 10

00

01

11

10

nd

Q1Q0

0

0

X X X X

0

0

0

0

1

1

1

1

10 D0

00 01 11 10

00

01

11

10

nd

Q1Q0

1

0

X X X X

0

1

0

0

0

1

0

1

11 D1

o  Use the state table along with DFF behavior to derive FF input equa,ons.

o  Note: Once again… With DFF, the input equa%ons EQUAL the next state columns of the state table.


Example (12)

o  Use the state table to derive the output equa,ons.

00 01 11 10

00

01

11

10

nd

Q1Q0

0

1

X X X X

0

0

1

1

0

0

0

0

00 release

-


Example (13)

o  Finally, we can draw our schema,c with two DFF, and logic equa,ons to produce the flip-‐flop inputs and the output equa,on.

D Q

R

D Q

R

Q1

Q0

releaseD1d

n

D0

o  Note that we can use the resets on the DFF to reset the circuit into its iniAal state (this was a result of the encoding scheme that made the iniAal state 00).

week$9.1$sequen,al$circuits$ design$and$analysis$pami.uwaterloo.ca/~basir/ece124/week9-1.pdf ·...

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