EE 290C

CMOS Analog Design Using All-region MOSFET Modeling

Carlos Galup-Montoro

Univ. of Santa Catarina, Brazil; UC Berkeley

373 Cory Hall

carlosgalup@gmail.com

http://eel.ufsc.br/~lci/faculty.html

2

� Course Format: Two hours of lecture and one hour of project discussion per week

� Prerequisites: EE140 Linear Integrated Circuits or equivalent

� Grading Policy: Homework 50% + Project 50%

� Textbook: CMOS Analog Design Using All-region MOSFET Modeling, M. C. Schneider and C. Galup-

Montoro, Cambridge University Press, 2009

290C Basics

CMOS Analog Design Using All Region MOSFET Modeling

Analog Bipolar and MOS Circuits

3

•Bipolar and MOS

A. B. Grebene, Bipolar and MOS Analog Integrated Circuit Design, 1983.

K. R. Laker and W. M. C. Sansen, Design of Analog Integrated Circuits and

Systems, 1994.

D. A. Johns and K. Martin, Analog Integrated Circuit Design, 1997.

P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of

Analog Integrated Circuits, Fourth Edition, 2001.

W. M. C. Sansen, Analog Design Essentials, Springer, Dordrecht, 2006

•MOS

B. Razavi, Design of Analog CMOS Integrated Circuits, 2001.

F. Maloberti, Analog Design for CMOS VLSI Systems, 2001.

P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design, 2002.CMOS Analog Design Using All Region MOSFET Modeling

Important Differences between Bipolar

Transistors (BJTs) and MOSFETs

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A) BJTs are three-terminal devices and MOSFETs are four-

terminal devices

B) Differences in the internal symmetries of the most

commonly used BJTs and MOSFETs

C) BJT exponential current law vs. MOS current law

D) The geometric degrees of freedom for MOSFETs in

analog design

E) Quality of BJT and MOSFET models

CMOS Analog Design Using All Region MOSFET Modeling

5

Ebers-Moll Equivalent Circuit of an npn

Transistor

E

B

αRIR αFIF

IF IR

IE IC

IB

CDE DC

C F F RI I Iα= −

E R R FI I Iα= −

( ) (1 ) (1 )B C E F F R RI I I I Iα α= − + = − + −

Forward and reverse currents

CMOS Analog Design Using All Region MOSFET Modeling

The Capacitive Model of the MOS

Structure

6

VGB

p- type neutral

region

depletion

region

φs

φs

1s ox

GB ox b

d C

dV C C n

φ ′= =

′ ′+

VGB

oxC′

bC′

CMOS Analog Design Using All Region MOSFET Modeling

7

MOSFET: Symmetric Strong and Weak

Inversion Models

� Strong inversion

� weak inversion

VDB

(b)

p-type substrate

n+ n+

VSB

VGB

ID

D F RI I I= −

( )2

( ) ( ) 02

F R GB SB DB TI V nV V

n

β= − −

( ) ( )( )0 0/ /

0GB T SB t GB T DB tV V nV n V V nV n

D F R

WI I I I e e

L

φ φ− − − −= − = −

ox

WC

Lβ µ ′=

CMOS Analog Design Using All Region MOSFET Modeling

Intrinsic Gain Stages: (a) Common-

Source and (b) Common-Emitter

Amplifiers

8CMOS Analog Design Using All Region MOSFET Modeling

Small-Signal Circuit and Frequency

Response of the Amplifiers

9

mo i

L

b

gv v

j Cω

ω ω

≅ −

>>CMOS Analog Design Using All Region MOSFET Modeling

Design of Common-Emitter and

Common-Source Amplifiers

10

BJT

MOSFET

( ) 1v u

A ω = 2 . .m u L Lg C G B W Cω π= =

2 . . .C m t L t

I g GBW Cφ π φ= =/BE tV

C SI I eφ=

( )2

0

1

2Dsi ox GB T SB

WI C V V nV

n Lµ

′= − − ( )

2

2 /

mDsi

ox

ngI

C W Lµ=

′

CMOS Analog Design Using All Region MOSFET Modeling

Example: GBW = 10 MHz, CL = 10 pF

= 80·10-6 A/V2, n = 1.35

W/L IDsi (µµµµA)1 ID (µµµµA)2

∞∞∞∞ 0 22

500 6.6 28.6

100 33.2 55.2

50 66.4 88.4

10 332 354

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oxCµ ′

2 . . 628 /m L

g GBW C A Vπ µ= =

1 Strong inversion model. 2 Accurate all-

region MOSFET model

CMOS Analog Design Using All Region MOSFET Modeling

All Region “Empirical” Model of the

MOSFET

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6 31.35 628 10 .26 10 22 µWI m tI ng Aφ − −= = ⋅ ⋅ ⋅ =

( )1

2 /

mD WI Dsi m t

ox t

gI I I ng

C W Lφ

µ φ

= + = +

′

( )( )

/1

/

thD WI

W LI I

W L

= +

( ) ( )/ 2m ox tth

g W L Cµ φ′=

22 µD Dsi

I A I= +

CMOS Analog Design Using All Region MOSFET Modeling

Aspect Ratio vs. Current Excess in a

MOSFET Design

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( )( )

/1

/

thD WI

W LI I

W L

= +

CMOS Analog Design Using All Region MOSFET Modeling

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Consistent Modeling of FETs: Use of

Series Associations of FETsD

S

G

B

W

L

D

D

W

L

S

S

I D

X

MD

MS

ID

= (W

L eq [ g ( V

G V

S - g ( V

G V

D ) , ) , ) ]

(W

Leq =

W

L D W

L S

(W

L D + (W

L S

)

( ) ( )

) )

CMOS Analog Design Using All Region MOSFET Modeling

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Series-Parallel Associations of FETs

CMOS Analog Design Using All Region MOSFET Modeling

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Series Associations of FET’s vs. Long

Channel MOSFETs

Series association Long-channel

nominal VT L-dependent VT

Characterize one

transistor ( performance

of the shortest transistor

is “optimized”)

L-dependent characterization

(halo/pocket implants effects)

“accurate” for current

mirrors

L-dependent accuracy

Gate current more

predictable CMOS Analog Design Using All Region MOSFET Modeling

17

Application of SeriesParallel Associations of FETs-Three M:1 Current Mirrors

� a) M :1

� B) N=√M, N:1/N

� C) M: N/N

M

IOut

M : 1

MB

N

N

Ma

Mb

(c)

MA

N

Iin

IOut

Ma1

N

Mb2

N2 : 1

(b)

VG

MA

MB

Ma

MA

= M parallel Ma transistors

MB

IinIOut

M : 1

(a)

∆βaj, ∆VTaj∆βB ∆VTB

VG

MA

Iin

CMOS Analog Design Using All Region MOSFET Modeling

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Current Mismatch in Two M:1 Current

Mirrors

Arnaud, JSSC Sep. 06

CMOS Analog Design Using All Region MOSFET Modeling

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M-2M Digital-to-Analog Converter 1:Mbb can be substituted by set of four transistors

VG

ID1 ID2

ID

ID2a ID2bID1

Ma MbbMba

MbdMbc

MdMc

CMOS Analog Design Using All Region MOSFET Modeling

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M-2M Digital-to-Analog Converter 2:8 bit DAC with M-2M Ladder

Q0Q6

DoD Q

ck

Q1

D Q

ck

Q7

D Q

ck

Di

Ck

D Q

ck

M72

M71

M73

Q7

-Q7

-Q7

Q7

M62

M61 M64

M63

Q6

-Q6

-Q6

Q6

M02

M01 M04

M03

Q0

-Q0

-Q0

Q0

MB2

MB1

I0V0

IGVG

M00

VR IRIB VB

GB

CMOS Analog Design Using All Region MOSFET Modeling

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M-2M Digital-to-Analog Converter 3:Normalized current mismatch for a 10 µm x 10 µm

transistor

CMOS Analog Design Using All Region MOSFET Modeling

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M-2M Digital-to-Analog Converter 4

Standard deviation of the measured error from 20 samples of DAC0

CMOS Analog Design Using All Region MOSFET Modeling

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M-2M Digital-to-Analog Converter 5

Top area is the M-2M ladder and the bottom area is the serial register.

Klimach. ISCAS 08

CMOS Analog Design Using All Region MOSFET Modeling

290C Course Outline

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- MOSFET modeling (3 weeks)

- Mismatch and noise (2 weeks)

- Basic CMOS building blocks (5 weeks)

- Op amps ( 4 weeks)

CMOS Analog Design Using All Region MOSFET Modeling

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290C Learning Goals

� Understand and use an all-region ( accumulation,

WI, MI and SI) compact MOSFET model for analog

design

� Acquire a deep understanding ( nonlinearities,

noise, mismatch) of the basic CMOS build blocks

and op amps

� Apply the above concepts in a design project

CMOS Analog Design Using All Region MOSFET Modeling

Similar Approaches to CMOS Design

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Paul G. A. Jespers; The gm/ID Design Methodology for CMOS

Analog Low Power Integrated Circuits

2009, ISBN: 978-0-387-47100-6

D. M. Binkley; Tradeoffs and Optimization in Analog CMOS

Design ISBN: 978-0-470-03136-0, Wiley 2008.

Danica Stefanovic and Maher Kayal; Structured Analog CMOS

Design Series: Analog Circuits and Signal Processing

2009, ISBN: 978-1-4020-8572-7

CMOS Analog Design Using All Region MOSFET Modeling