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TRANSCRIPT
Ensuring Signal and Power Integrity
for High-Speed Digital Systems
An EMC Perspective
Christian Schuster
Institut für Theoretische Elektrotechnik
Technische Universität Hamburg-Harburg (TUHH)
Invited Presentation at the IEEE International Conference on Consumer
Electronics (ICCE), Berlin, September 6-9, 2015
C. Schuster, TUHH – 2
Abstract
With increasing data rates and reduced margin for communication
errors both consumer electronic products as well a large-scale
digital systems like data centers have to be designed very carefully
with respect to their “electrical integrity”. In this presentation two
aspects of this integrity, namely signal integrity (SI) and power
integrity (PI), will be explained in some detail. The focus will be put
mostly on packaging and electromagnetic compatibility (EMC)
aspects. Topics that will be addressed include discontinuities,
transmission line effects, crosstalk, bypassing and decoupling, via
and power plane effects, return current issues, and measurement
techniques. The presentation should be suitable for both a
technical and a non-technical audience. For more information on SI
and PI research at TUHH visit: http://www.tet.tuhh.de
C. Schuster, TUHH – 3
(1) Motivation
(2) SI, PI & EMI
(3) High-Speed Digital Systems
(4) Improving SI
(5) Improving PI
(6) Wrapping Up
Outline
C. Schuster, TUHH – 4
(1)
Motivation
C. Schuster, TUHH – 5
Digital Link Data Rates
Data Rate [Gb/s]
10
5
CPU to CPU Storage Network/ Peripherals
Infiniband
10.0
PCIe
5.0
Hyper
Transport
5.2
SA-SCSI
3.0
SATA III
6.0 Fibre
Channel
4.25
10G Ethernet
10.0
USB 2.0
0.5
FireWire
up 3.2
DVI
3.7
DDR3
8-12
C. Schuster, TUHH – 6
Digital Link Frequency Trends
C. Schuster, TUHH – 7
(2)
SI, PI & EMI
C. Schuster, TUHH – 8
Power Plane Ground Plane
Driver Via
Receiver
Digital Link Seen From ..
DC Power Supply
PCB
C. Schuster, TUHH – 9
.. a Signal Transmission Perspective
Signal Transmission Issues:
Attenuation, Reflection, Dispersion, Interference, Crosstalk
C. Schuster, TUHH – 10
.. a Signal Transmission Perspective
Signal Transmission Issues:
Attenuation, Reflection, Dispersion, Interference, Crosstalk
C. Schuster, TUHH – 11
.. a Power Delivery Perspective
Power Delivery Issues:
Voltage Drop, Switching Noise, Crosstalk
C. Schuster, TUHH – 12
.. a Power Delivery Perspective
Power Delivery Issues:
Voltage Drop, Switching Noise, Crosstalk
C. Schuster, TUHH – 13
.. an EMI Perspective
Electromagnetic Interference Issues:
Near Field Coupling, Radiated Emissions
C. Schuster, TUHH – 14
.. an EMI Perspective
Electromagnetic Interference Issues:
Near Field Coupling, Radiated Emissions
C. Schuster, TUHH – 15
SI + PI + EMI = Comprehensive EMC
Elements of a comprehensive EMC
C. Schuster, TUHH – 16
SI/PI Foundations and Resources
SI / PI
Transmission
Line Theory
Antenna
Theory
Network
Theory System Theory
Coupler &
Filter Design
EM Field
Theory
Communication
Theory
Circuit Design &
Simulation
Numerical
Techniques
Electromagnetic
Compatibility
HF Measurement
Techniques
CAD Tools
Material
Characterizationj
C. Schuster, TUHH – 17
SI/PI Foundations and Resources
© C. Schuster, TUHH
Figures © C. Schuster,
TET, TUHH
C. Schuster, TUHH – 18
SI/PI in the IEEE Community
Number of publications
found in IEEE Xplore
containing the index
terms:
“Signal Integrity“
“Power Integrity“
C. Schuster, TUHH – 19
SI/PI in the EMC Community
C. Schuster, TUHH – 20
SI/PI in the EMC Community
C. Schuster, TUHH – 21
(3)
High-Speed Digital Systems
C. Schuster, TUHH – 22
A High-Speed Digital System
Housing / Chassis
Connector
Package / Module
IC (Transmitter)
IC (Receiver)
Connector
Cable
Backplane / Motherboard
Socket
Da
ug
hte
rca
rd
C. Schuster, TUHH – 23
The SI Challenge
Connector
Interconnect
(Link)
C. Schuster, TUHH – 24
The ideal interconnect will simply delay the signal:
Any real interconnect will additionally change timing and amplitude:
t
Tx Rx
t
Tx Rx
Effect of Interconnects
C. Schuster, TUHH – 25
Jitter and Noise
The deviations in timing and amplitude are in general called:
t
Timing jitter or simply: JITTER
Amplitude noise or simply: NOISE
C. Schuster, TUHH – 26
NOISE
Receiver
Sampling
Point
In the eye diagram timing jitter and anplitude noise are defined as follows:
JITTER
Jitter and Noise
C. Schuster, TUHH – 27
The PI Challenge
Connector VRM
1 V
3.3 V
C. Schuster, TUHH – 28
Effect of Common Power Delivery
IC #1 IC #2
U0
ZPDN
PDN = Power Delivery Network
C. Schuster, TUHH – 29
Effect of Common Power Delivery
U0
R uIC L
iGate1, iGate2, …
Du
uIC = U0 - Du
...)()(...)()()( Gate1Gate1Gate1Gate1 D titidt
dLtitiRtu
"DC-drop or IR-drop" "DI-drop or DI-noise"
C. Schuster, TUHH – 30
(4)
Improving SI
C. Schuster, TUHH – 31
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce Coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 32
Tx
High performance digital links are mostly serial: HSS = HIGH SPEED SERIAL.
The technology is typically CMOS with the links being voltage mode,
unidirectional, serial, point-to-point, and source-synchronous. Both single-ended
and differential signaling can be found.
For improved bandwidth equalization is typically used in the Tx, Rx, or both.
CDR
.
.
.
Deserializer
Interconnect
Clock & Data Recovery
Data .
.
.
Serializer
Data
Clock
Equalizer
Equalizer
+ Slicer
Rx
Typical Digital Link Design
C. Schuster, TUHH – 33
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce Coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 34
Effect of Terminations
Let‘s use the following interconnect (link) model:
lZ ,,0
u0 u1 u2
LZSZ
Transmitter Receiver Interconnect
??
C. Schuster, TUHH – 35
Metal Dielectric
Microstrip
Line
Stripline
(symmetric)
(h = height of dielectric,
w = conductor width,
t = conductor thickness)
tw
hZ
8.0
98.5ln
41.1
87
r
0
tw
hZ
8.0
9.1ln
60
r
0
(h = height of dielectric,
w = conductor width,
t = conductor thickness)
Transmission Lines in Digital Systems
C. Schuster, TUHH – 36
Let‘s use the following interconnect (link) model:
lZ ,,0
u0 u1 u2
LZSZ
!max. and const.0
2 u
u
Effect of Terminations
??
C. Schuster, TUHH – 37
lZ ,,0
LZSZ
input acceptance TL transfer function
source transmission load transmission
source reflection load reflection
Effect of Terminations
C. Schuster, TUHH – 38
lZ ,,0
LZSZ
Effect of Terminations
!!1
)1(
1 SL
2
L
SL
2
L
0
trans
0
2
rrH
rHa
rrH
tHa
u
u
u
u
C. Schuster, TUHH – 39
Hu
u
2
1
0
2 0LS ZZZ
lZ ,,0
LZSZ
0L ZZ Hau
u
0
2
Effect of Terminations
C. Schuster, TUHH – 40
Matched interconnect:
Mismatched Interconnect:
Time
low source impedance
high source impedance
D2 T
Time
Vo
lta
ge
lossless transmisson line
Vo
lta
ge
DT
lossy transmisson line
Effect of Terminations
C. Schuster, TUHH – 41
3
4
2
5 6
1
1 kΩ1,Ω50,Ω10 L0S ZZZ
zero losses
2 Ω100,Ω50,Ω50 L0S ZZZ
zero losses
3 Ω50,Ω50,Ω50 L0S ZZZ
zero losses
4 Ω100,Ω50,Ω100 L0S ZZZ
zero losses
kΩ1,Ω50,Ω10 L0S ZZZ
non-zero losses
5
6 Ω50,Ω50,Ω50 L0S ZZZ
non-zero losses
(all lines have a delay of 0.1 ns)
Effect of Terminations
C. Schuster, TUHH – 42
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 43
Packaging of Digital Systems
Connector
Interconnect
(Link)
C. Schuster, TUHH – 44
Effect of Lumped Discontinuities
Signal
Out
Signal
In
u1 u2 50
50 2.5
nH
Tx-Output Bond Wire Rx-Input
Source
Voltage
Received
Voltage
© C. Schuster, TUHH
C. Schuster, TUHH – 45
Effect of Lumped Discontinuities
Attenuation of high frequency signal components
„Slowing down" of the edges of a digital signal
Frequency [GHz] Time [ps]
Magnitude o
f u
2 /
u1
u2(t
) /
u1(t
)
Frequency Response Step Response
f0 ≈ 6.37 GHz t 1/w0 = 25 ps
C. Schuster, TUHH – 46
Effect of Lumped Discontinuities
u1 u2
Signal
In Signal
Out
50 50 1 pF
Tx-Output Via Rx-Input
Source
Voltage
Received
Voltage
© Y. Kwark, IBM
C. Schuster, TUHH – 47
Effect of Lumped Discontinuities
Attenuation of high frequency signal components !!
„Slowing down" of the edges of a digital signal !!
Frequency [GHz] Time [ps]
Magnitude o
f u
2 /
u1
u2(t
) /
u1(t
)
Frequency Response Step Response
f0 ≈ 6.37 GHz t 1/w0 = 25 ps
C. Schuster, TUHH – 48
Effect of Distributed Discontinuities
lZ ,, 0Z0Z
GHzl
cf 952.2
4
1 inch, 45 Ohm mismatched transmission line at c0 /2
Frequency Response
(Scattering Parameters)
C. Schuster, TUHH – 49
Overall Effect of Discontinuities
0 0 0 0
Port1 Port2
Z=49
P=1cm
300fF
2nHZ=48
P=15cm
300fF
2nH
300fF
Z=52
P=5cm
300fF
Z=48
P=1cm
2nH
C. Schuster, TUHH – 50
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 51
Packaging of Digital Systems
Connector
Interconnect
(Link)
C. Schuster, TUHH – 52
(3) Near End (4) Far End
Aggressor Line (Active Line)
Victim Line (Quiet Line)
(1) Input (2) Output
Effect of Coupling
Consider two transmission lines in close proximity:
C. Schuster, TUHH – 53
IC
IC-NE IC-FE
Effect of Coupling
Consider two transmission lines in close proximity:
Capacitive Crosstalk
C. Schuster, TUHH – 54
UL
UL-NE UL-FE
Effect of Coupling
Consider two transmission lines in close proximity:
Inductive Crosstalk
C. Schuster, TUHH – 55
UL
IC
(3) Near End (4) Far End
(1) Input (2) Output
NEXT =
Near End Crosstalk (sum of ind. and cap. crosstalk)
FEXT =
Far End Crosstalk (difference of ind. and cap. crosstalk)
Consider two transmission lines in close proximity:
Effect of Coupling
C. Schuster, TUHH – 56
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce Coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 57
Attenuation usually increases with frequency. The exact calculation can be
difficult but for weakly lossy lines:
a convenient approximations exists:
with ac = attenuation due to conductor losses and ad = attenuation due to
dielectric losses. The following dependencies are often found:
with k = electrical conductivity and tan d = loss tangent.
CGLR ww and
dc22
aaa
C
LG
L
CR
dw tan~ CGkw /~R
Contributors to Line Losses
C. Schuster, TUHH – 58
Time Domain Effect of Losses
When taking into account DC losses the effect in the time domain is twofold:
edge degradation
DC drop
Time
Voltage
step response
without losses
step response
with losses
C. Schuster, TUHH – 59
For the frequency dependence follows with these assumptions:
In other words, a typical semi-
logarithmic plot of the magnitude
of the transfer function will be
dominated by a square root
behavior at lower and a linear
behavior at higher frequencies.
fflllleeeeeeH
dcdc constconst
~aaa
ffH dc constconst~ln
linear
square root
total
Frequency Dependence of Losses
C. Schuster, TUHH – 60
Dielectric Packaging Materials
Dielectric materials are typically classified with respect to their
relatice dielectric constant r and their loss tangent tan d:
tan d
r
Quartz (SiO2) Alumina (Al2O3)
"FR-4"
Silicon Teflon (PTFE)
C. Schuster, TUHH – 61
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 62
Overview of Equalization Techniques
Tx
CDR
.
.
.
Deserializer
Interconnect
Clock & Data Recovery
Data .
.
.
Serializer
Data
Clock
Equalizer
Equalizer
+ Slicer
Rx
Most high speed serial links nowadays use some EQUALIZATION, i.e. some
kind of signal processing technique to correct for the degradations in the
interconnect, and thereby improve the quality of signals. When the corrections
are applied at the transmitter equalization is sometimes also called DE-
EMPHASIS or PRE-EMPHASIS. Apart from continuous time equalization (CTE)
signal processing takes place in the discrete time domain / digital filters.
C. Schuster, TUHH – 63
Overview of Equalization Techniques
In frequency domain the effect of equalization can be to some extent be
visualized as the flattening of the transfer function of the interconnect.
An interconncet with a completely flat transfer function would transmit a signal
undisturbed apart from a potential amplitude scaling.
f
TF
Interconnect
f
Equalization
f
Equalized Response
=
C. Schuster, TUHH – 64
Two big classes of (digital, discrete) equalization exist:
Equalization
Linear Feedforward
Equalization (LFE/FFE) Distributed Feedback
Equalization (DFE)
- Uses only information from the
current and previously received
bits
- Can be interpreted as a non-
recursive digital filter (finite
impulse response filter)
- Uses a feedback loop after the
signal has been decoded by an
LFE/FFE
- The output of the LFE/FFE is
added to the feedback loop
resulting in the equalized signal
Overview of Equalization Techniques
C. Schuster, TUHH – 65
(5)
Improving PI
C. Schuster, TUHH – 66
Improving Power Integrity
1. Decrease PDN impedance
2. Add decoupling
3. Add more decoupling
4. Use several power supplies
5. Use on-chip VRMs
C. Schuster, TUHH – 67
Discrete
Decoupling
Capacitors
(various sizes)
IC incl.
Power/Ground Grid
& Integrated Decaps
Printed Circuit Board incl.
Power/Ground Planes
High Power
DC Supply
Voltage
Regulator
Module
Package incl.
Power/Ground
Planes
PDN Elements
C. Schuster, TUHH – 68
Improving Power Integrity
1. Decrease PDN impedance
2. Add decoupling
3. Add more decoupling
4. Use several power supplies
5. Use on-chip VRMs
C. Schuster, TUHH – 69
A typical maximum ripple for ditigal systems is:
With a 10% value the following numbers can be obtained for
applications … of the early 1990'ies: … of 2000 and on:
PDN Impedance
Ω5.0
W5
Ω0.5/
A1
V0.5
Target
avg
avg0
avg
0
Z
P
iu
i
u
%10to%5ripple maximum0
max D
u
u
Ω001.0
W144
Ω01.0/
A120
V2.1
Target
avg
avg0
avg
0
Z
P
iu
i
u
= 1 m !
C. Schuster, TUHH – 70
Improving Power Integrity
1. Decrease PDN impedance
2. Add decoupling
3. Add more decoupling
4. Use several power supplies
5. Use on-chip VRMs
C. Schuster, TUHH – 71
Low Frequency Equivalent PDN Circuit
R L
U0 ~ ZIC ( f )
C. Schuster, TUHH – 72
… including a "decoupling" or "bypass" capacitor:
Low Frequency Equivalent PDN Circuit
R L
U0 ~ ZIC ( f ) C
… some nF to some mF
© C. Schuster, TUHH
C. Schuster, TUHH – 73
Heuristic explanation:
Frequency domain: Beyond the resonance frequency the capacitor
decouples the part of the PDN that lies "left" of him, i.e. the IC sees
only the impedance of the capacitor.
Time domain: The capacitor stores charges close to the IC that can
become currents needed for fast switching. It is like a "small battery".
Decoupling Effect
R L
U0 ~ ZIC ( f ) C
C. Schuster, TUHH – 74
Unfortunately, there is no ideal capacitor available in the real world!
Ideal world: … and real world:
R is also is called the EQUIVALENT SERIES RESISTANCE
(ESR) and L the EQUIVALENT SERIES INDUCTANCE (ESL).
As a consequence any real world capacitor behaves approximately
like an inductor beyond its resonance frequency:
Real Word Decoupling Capacitors
C R L C
LC/10 w
C. Schuster, TUHH – 75
Improving Power Integrity
1. Decrease PDN impedance
2. Add decoupling
3. Add more decoupling
4. Use several power supplies
5. Use on-chip VRMs
C. Schuster, TUHH – 76
More Decoupling
Speed of charge
delivery,
effective
frequency
~
board-level package-level chip-level
Amount of
charge, size
of decoupling
capacitance
C. Schuster, TUHH – 77
More Decoupling P
DN
Im
pedance
Target
Impedance
Inductance
of
VRM
Capacitance
of Bulk
Decaps
ESL of
Decaps, Pads
and Vias
Capacitance of
P/G Planes &
Small Decaps
ESL of Planes
and Inductance
of Package
Remaining
On.Chip
Inductance
500 MHz 10 GHz 1 GHz 1 MHz
Capacitance of
Decaps on
Package and IC
~
board-level package-level chip-level
C. Schuster, TUHH – 78
...),2,1,0,(22
22
rr
0
nm
b
n
a
mcfmn
Resonance frequencies of power/ground plane pairs:
Examples of standing wave patterns on a rectangular power/ground plane pair.
Power/Ground Plane Resoances
C. Schuster, TUHH – 79
(6)
Wrapping Up
C. Schuster, TUHH – 80
Comprehenisve EMC of Digital Systems
The basic goals of SI, PI, and EMI control for a digital system are
complementary to each other.
SIGNAL INTEGRITY: insure
acceptable quality of signals within
POWER INTEGRITY: insure
acceptable quality of power
delivery within
EMI: insure acceptable level of
interference with the outside
EMI
Frequency
Target
System
Frequency
PDN
Impedance
Target
System
SNR
Frequency
Target System