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Combinational Logic
• Logic circuits for digital systems may be
combinational or sequential.
• A combinational circuit consists of input variables,
logic gates, and output variables.
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Analysis procedure
• To obtain the output Boolean functions from a
logic diagram, proceed as follows:
1. Label all gate outputs that are a function of input variables
with arbitrary symbols. Determine the Boolean functions
for each gate output.
2. Label the gates that are a function of input variables and
previously labeled gates with other arbitrary symbols. Find
the Boolean functions for these gates.
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Analysis procedure
3. Repeat the process outlined in step 2 until the outputs of
the circuit are obtained.
4. By repeated substitution of previously defined functions,
obtain the output Boolean functions in terms of input
variables.
AOI Logic Implementation
This presentation will demonstrate how to…
• Design an AOI logic circuit from a Sum-Of-
Products (SOP) logic expression.
• Design an AOI logic circuit from a Product-Of-
Sums (POS) logic expression.
EQUALS
AOI Logic Circuit
C B B AOUT
Logic Expression
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An example of an SOP implementation is shown. The SOP expression is
an AND-OR combination of the input variables and the appropriate
complements.
Combinational Logic Circuits
SOP
DE
ABC A
B
C
E
D
X = ABC + DE
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When the output of a SOP form is inverted, the circuit is called an AND-
OR-Invert circuit. The AOI configuration lends itself to product-of-sums
(POS) implementation.
An example of an AOI implementation is shown. The output expression
can be changed to a POS expression by applying DeMorgan’s theorem
twice.
Combinational Logic Circuits
POS DE
ABC A
B
C
E
D
X = ABC + DE X = ABC + DE
X = (A + B + C)(D + E)
X = (ABC)(DE)
AOI
DeMorgan
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The truth table for an exclusive-OR gate is
Exclusive-OR Logic
A
B
OutputInputs
A B X
0011
0101
0110
Notice that the output is HIGH whenever A and B
disagree.
The Boolean expression is
The circuit can be drawn as
X = 1
Symbols:
Distinctive shape Rectangular
outline
X = AB + AB
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The truth table for an exclusive-NOR gate is
Exclusive-NOR Logic
A
B
Notice that the output is HIGH whenever A and B
agree.
The Boolean expression is
The circuit can be drawn as
X
Symbols:
Distinctive shape Rectangular
outline
OutputInputs
A B X
0011
0101
1001
= 1
X = AB + AB
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NAND Logic
Convert the circuit in the previous example to one that
uses only NAND gates.
Recall from Boolean algebra that double inversion cancels. By adding
inverting bubbles to above circuit, it is easily converted to NAND gates:
C
A
B
A
C A + A B X =
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NAND gates are sometimes called universal gates because they
can be used to produce the other basic Boolean functions.
Universal Gates
Inverter
A A
AND gate
A B
AB
A
B
A + B
OR gate
A
B
A + B
NOR gate
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Recall from DeMorgan’s theorem that AB = A + B. By using
equivalent symbols, it is simpler to read the logic of SOP forms. The
earlier example shows the idea:
NAND Logic
C
A
B
A
C A + A B X =
The logic is easy to read if you (mentally) cancel the two connected
bubbles on a line.
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NOR Logic
B
A
C
A
X =
Again, the logic is easy to read if you cancel the two connected
bubbles on a line.
Alternatively, DeMorgan’s theorem can be written as A + B = A B.
By using equivalent symbols, it is simpler to read the logic of POS
forms. For example,
(A + B)(A + C)
Designing AOI SOP Logic Circuits
Design Steps
• Implement each Minterm in the logic expression with an
AND gate with the same number of inputs as there are
variables in the Minterm. (i.e., AB = 2 input gate, ABC = 3
input gate, ABCD = 4 input gate, etc.)
• OR together the outputs of the AND gates to produce the
logic expression.
• If necessary, gates can be cascaded to create gates with
more inputs.
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Example #1: AOI Implementation SOP
Example
Design an AOI Logic Circuit for the SOP logic
expression shown below.
B A D C B D C B A F2
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Example #1: AOI Implementation SOP
Example
Design an AOI Logic Circuit for the SOP logic
expression shown below.
B A D C B D C B A F2
Solution
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Example #2: AOI Implementation SOP
Example
Unfortunately, in this class, we only have access to (2)
input OR gates and (2) & (3) input AND gates. Limiting
your design to these gates, redesign the AOI Logic
Circuit for the SOP expression in the previous example.
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Example #2: AOI Implementation SOP
Example
Unfortunately, only (2) input OR gates and (2) & (3)
AND gates exist in hardware. Limiting your design to
these gates, redesign the AOI Logic Circuit for the SOP
expression in the previous example.
Solution
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Designing AOI POS Logic Circuits
Design Steps
• Implement each Maxterm in the logic expression with an
OR gate with the same number of inputs as there are
variables in the Maxterm. (i.e., A+B = 2 input gate,
A+B+C = 3 input gate, A+B+C+D = 4 input gate, etc.)
• AND together the outputs of the OR gates to produce the
logic expression.
• If necessary, gates can be cascaded to create gates with
more inputs.
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Example #3: AOI Implementation POS
Example
Design an AOI Logic Circuit for the POS logic
expression shown below.
ZWYXWZYXW F4
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Example #3: AOI Implementation POS
Example
Design an AOI Logic Circuit for the POS logic
expression shown below.
Solution ZWYXWZYXW F4
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Example #4: AOI Implementation POS
Example
Limiting your design to only (2) input OR gates and (2)
& (3) input AND gates, redesign the AOI Logic Circuit
for the POS logic expression in the previous example.
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Example #4: AOI Implementation POS
Example
Limiting your design to only (2) input OR gates and (2)
& (3) input AND gates, redesign the AOI Logic Circuit
for the POS logic expression in the previous example.
Solution
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Example
F2 = AB + AC + BC; T1 = A + B + C; T2 = ABC; T3 = F2’T1;
F1 = T3 + T2
F1 = T3 + T2 = F2’T1 + ABC = A’BC’ + A’B’C + AB’C’ + ABC
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Derive truth table from logic
diagram • We can derive the truth table in Table 4-1 by using
the circuit of Fig.4-2.