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January 2013 Visit us at www.e-grid.net Page 1 GRID.pdf GRID.pdf Subscribe to the e-GRID! Visit www.e-grid.net/subscribe January 2013 CHAPTER MEETINGS SCV-TMC - 1/3 | The Dark Side of "Agile" - popularity, misgivings, strengths, weaknesses ... [more] SCV-Life - 1/7 | How the Race for Microprocessor Leadership Transformed Silicon Valley: 70's, 80's, and 90's – panel ... [more] SCV-ComSoc - 1/9 | Practical Mesh Networks in Sensor Networking - Dust Networks, multi-hop wireless, appliances, meters ... [more] SCV-CPMT - 1/9 | New Class of Low-k Dielectrics for Advanced Interconnects - silica-based vs silicon carbide, reliability [more] SCV-Nano - 1/15 | Commercializing Nanoelectronics: Opportunities in Material and Life Sciences - low-cost, sensors, treatments ... [more] SCV-CNSV - 1/15 | Building and Scaling Nerd Communities: Hacker Dojo and Dev House - innovation, evolution, spreading ... [more] SPECTRUM - 1/16 | LTE Components Drive Multimode Mobile Broadband - solutions, cellular base stations, HetNet ... [more] SCV-GOLD - 1/21 | Bowling Night with the IEEE - social time, great fun, all invited ... [more] SCV-CE - 1/22 | Annual CES Download - latest, greatest, weirdest new products seen at CES ... [more] SCV-CSS - 1/23 | Resonance Study of a Coupled Mechanical Oscillator - Part 2: Model and Analysis - modeling, analysis ... [more] SCV-WIE - 1/23-24 | IEEE WIE/Google Conference: Enhancing the Sustainability of Women in Technology - leadership, skills devt [more] SCV-CPMT - 1/24 | Packaging for the Cloud Computing Era - bandwidth, memory density, Bond Via Array, memory-stacks ... [more] SCV-CS - 2/12 | Combating Cyber Attacks: Using a 288-core Server - traffic, mPIPE, intrusion detection, performance-per-watt ... [more] SCV-CPMT - 2/13 | Advanced Organic Substrate Technologies to Enable Extreme Electronics Miniaturization - uflex, in vivo … [more] SCV-CNSV - 2/19 | Review of Contract Language for Consultants - consulting agreements, partnerships, bylaws, leases ... [ [more] SCV-CPMT - 2/21 | New Wafer-Level Embedded Package Structure & Technology using Large-Scale Panel Assembly - face-down [more] Support our advertisers MARKETPLACE – Services page 3 Santa Clara University Grad School of Engineering Winter Open University [more] - Early-morning, evening, Saturday classes CONFERENCE CALENDAR Jan 23-24: IEEE WIE/Google Conference: Enhancing the Sustainability of Women in Technology - at Google, Mtn View [more] Jan 28-31: DesignCon 2013 - Santa Clara Convention Center [more] Intl Solid State Circuits Conference (ISSCC) - San Francisco Marriott Marquis Hotel [more] March 3-6: The SharePoint Technology Conference (SPTechCon) - Hilton Union Square, SF [more] March 4-5: Interdisciplinary Engng Design Education Conference (IEDEC) - Techmart, Santa Clara [more] March 4-6: Int’l Symposium on Quality Electronic Design (ISQED) - Techmart, Santa Clara [more] March 17-21: Optical Fiber Comm'n Conference (OFC/NFOEC) - Anaheim Convention Center [more] CALL FOR PAPERS: Conference on Lasers and ElectroOptics (CLEO) - June 9-14, 2013 - San Jose Convention Center Papers due January 30th. [more] Career Development Professional Skills Courses [more] - Consulting Skills for Engineers: How to Become a Trusted Advisor - Breakthrough Project Management - Clear Business, Technical, and Email Writing - Management Essentials and more CFD Multiphysics Seminars (no-cost) [more] - Semiconductor Process Design and Optimization - Flow-Thermal-Mixing Modeling for Designers ANSYS Simulation Software Classes [more] - ANSYS Icepak - ANSYS Workbench Simulation - Intro to ANSYS Maxwell 2D/3D - Intro to ANSYS Fluent

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Page 1: GRID.pdf GRID.pdf January 2013 · 2013-01-10 · January 2013 Visit us at Page 2 Your Networking Partner® January 2013 • Volume 60 • Number 1 IEEE-SFBAC ©2013 IEEE GRID is the

January 2013 V is i t us a t www .e-gr id .net Page 1

GRID.pdf GRID.pdf

Subscribe to the e-GRID!

Visit www.e-grid.net/subscribe

January 2013

CHAPTER MEETINGS SCV-TMC - 1/3 | The Dark Side of "Agile" - popularity, misgivings, strengths, weaknesses ... [more]

SCV-Life - 1/7 | How the Race for Microprocessor Leadership Transformed Silicon Valley: 70's, 80's, and 90's – panel ... [more]

SCV-ComSoc - 1/9 | Practical Mesh Networks in Sensor Networking - Dust Networks, multi-hop wireless, appliances, meters ... [more]

SCV-CPMT - 1/9 | New Class of Low-k Dielectrics for Advanced Interconnects - silica-based vs silicon carbide, reliability … [more]

SCV-Nano - 1/15 | Commercializing Nanoelectronics: Opportunities in Material and Life Sciences - low-cost, sensors, treatments ... [more]

SCV-CNSV - 1/15 | Building and Scaling Nerd Communities: Hacker Dojo and Dev House - innovation, evolution, spreading ... [more]

SPECTRUM - 1/16 | LTE Components Drive Multimode Mobile Broadband - solutions, cellular base stations, HetNet ... [more]

SCV-GOLD - 1/21 | Bowling Night with the IEEE - social time, great fun, all invited ... [more]

SCV-CE - 1/22 | Annual CES Download - latest, greatest, weirdest new products seen at CES ... [more]

SCV-CSS - 1/23 | Resonance Study of a Coupled Mechanical Oscillator - Part 2: Model and Analysis - modeling, analysis ... [more]

SCV-WIE - 1/23-24 | IEEE WIE/Google Conference: Enhancing the Sustainability of Women in Technology - leadership, skills devt [more]

SCV-CPMT - 1/24 | Packaging for the Cloud Computing Era - bandwidth, memory density, Bond Via Array, memory-stacks ... [more]

SCV-CS - 2/12 | Combating Cyber Attacks: Using a 288-core Server - traffic, mPIPE, intrusion detection, performance-per-watt ... [more]

SCV-CPMT - 2/13 | Advanced Organic Substrate Technologies to Enable Extreme Electronics Miniaturization - uflex, in vivo … [more]

SCV-CNSV - 2/19 | Review of Contract Language for Consultants - consulting agreements, partnerships, bylaws, leases ... [ [more]

SCV-CPMT - 2/21 | New Wafer-Level Embedded Package Structure & Technology using Large-Scale Panel Assembly - face-down [more]

Support our advertisers

MARKETPLACE – Services page 3

Santa Clara University Grad School of Engineering Winter Open University [more]- Early-morning, evening, Saturday classes

CONFERENCE CALENDAR

Jan 23-24: IEEE WIE/Google Conference: Enhancing the Sustainability of Women in Technology - at Google, Mtn View [more]

Jan 28-31: DesignCon 2013 - Santa Clara Convention Center [more]

Int’l Solid State Circuits Conference (ISSCC) - San Francisco Marriott Marquis Hotel [more]

March 3-6: The SharePoint Technology Conference (SPTechCon) - Hilton Union Square, SF [more]

March 4-5: Interdisciplinary Engng Design Education Conference (IEDEC) - Techmart, Santa Clara [more]

March 4-6: Int’l Symposium on Quality Electronic Design (ISQED) - Techmart, Santa Clara [more]

March 17-21: Optical Fiber Comm'n Conference (OFC/NFOEC) - Anaheim Convention Center [more] CALL FOR PAPERS: Conference on Lasers and ElectroOptics (CLEO) - June 9-14, 2013 - San Jose Convention Center Papers due January 30th. [more]

Career Development Professional Skills Courses [more]- Consulting Skills for Engineers: How to Become a Trusted Advisor - Breakthrough Project Management - Clear Business, Technical, and Email Writing - Management Essentials … and more

CFD Multiphysics Seminars (no-cost) [more]- Semiconductor Process Design and Optimization - Flow-Thermal-Mixing Modeling for Designers

ANSYS Simulation Software Classes [more]- ANSYS Icepak - ANSYS Workbench Simulation - Intro to ANSYS Maxwell 2D/3D - Intro to ANSYS Fluent

Page 2: GRID.pdf GRID.pdf January 2013 · 2013-01-10 · January 2013 Visit us at Page 2 Your Networking Partner® January 2013 • Volume 60 • Number 1 IEEE-SFBAC ©2013 IEEE GRID is the

January 2013 Vis i t us a t w w w . e - G R I D . n e t Page 2

Your Networking Partner ®

January 2013 • Volume 60 • Number 1

IEEE-SFBAC ©2013

IEEE GRID is the monthly newsmagazine of the SanFrancisco Bay Area Council of the Institute of Electrical andElectronics Engineers, Inc. As a medium for news fortechnologists, managers and professors, the editorialobjectives of IEEE GRID are to inform readers ofnewsworthy IEEE activities sponsored by local IEEE units(Chapters, Affinity Groups) taking place in and around theBay Area; to publicize locally sponsored conferences andseminars; to publish paid advertising for conferences,workshops, symposia and classes coming to the Bay Area;and advertise services provided by local firms andentrepreneurs.

IEEE GRID is published as the GRID Online Editionresiding at www.e-GRID.net, in a handy printable GRID.pdfedition at the end of each month, and also as the e-GRIDsent by email twice each month to more than 24,000 BayArea members and other professionals.

Editor: Paul WeslingIEEE GRIDPO Box 2110Cupertino CA 95015-2110Tel: 408 331-0114 / 510 500-0106 /

415 367-7323

Fax: 408 904-6997Email: editor@e-gr id.netwww.e-GRID.net

From the Editor

W elcome to a new year!

Since technology moves at such a quick pacehere in the SF Bay Area, I sometimes th ink thata year should be, say, 5 months. That seems tobe enough t ime to capture a fu l l year ’s wor th ofdevelopments. But the pace never seem s to letup.

You’ l l note that the Consumer Elec tronicschapter is having a meet ing on January 22nd –The CES Download – where they’ l l bediscuss ing and reviewing some of the latestdevelopments that were shown or announced atthe Consumer Electronics Show dur ing ear lyJanuary. That ’s a great t ime to see what mightpresage new developments in your own f ie ld.

You’ l l also see in th is issue of the GRIDseveral oppor tuni t ies to master model ing andsimulat ion sk i l ls – CFD, mul t i -phys ics, FEA, andother tools . Maybe some addi t ional sk i l ls wouldhelp you in your career.

As you make your new year ’s resolut ions, Isuggest that you make one of them a pledge toget informat ion and exper ience in another newaspect of your own f ie ld. Staying employable(and get t ing leading-edge ass ignments) is agood goal for engineers !

My best regards,

Paul

NOTE: This PDF version of the IEEE GRID – theGRID.pdf – is a monthly publication and isissued a few days before the first of the month.It is not updated after that. Please refer to theOnline edition and Interactive Calendar for thelatest information.

DIRECTORS

Santa Clara ValleyEd Aoki

Ram Sivaraman(Alt: Kim Parnell)

Oakland East BayBrent McHaleBill DeHope

San FranciscoMichael Butler

Shirin Tabatabai

OFFICERSChair: Shirin Tabatabai

Secretary: Ed Aoki/Brian BergTreasurer: Brad McHale

IEEE-SFBACPO Box 2110

Cupertino, CA 95015-2110

IEEE GRID

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January 2013 V i s i t us a t w w w . e - G R I D . n e t Page 3

Patent Agent Jay Chesavage, PE

MSEE Stanford 3833 Middlefield Road, Palo Alto 94303

[email protected]

www.File-EE-Patents.com TEL: 650-619-5270 FAX: 650-494-3835

Do you provide a service? Would you like more inquiries?

Access 25,000 engineers and managers IEEE Members across the Bay Area Monthly and Annual Rates available

Visit our Marketplace (page 3)

Download Rates and Services information: www.e-grid.net/docs/marketplace-f lyer.pdf

GRID.pdf

e-GRID

Professional Services Marketplace – [email protected] for information

Say you found them in our GRID MARKETPLACE

MET Laboratories

EMC – Product Safety

US & Canada

• Electromagnetic Compatibility • Product Safety Cert. • Environmental Simulation • Full TCB Services • Design Consultations • MIL-STD testing • NEBS (Verizon ITL & FOC) • Telecom • Wireless, RFID (DASH7 & EPCglobal Test Lab)

Facilities in Union City and Santa Clara

www.metlabs.com [email protected] 510-489-6300

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of Silicon Valley

• Become a member • Find a Consultant • Submit a Project

CaliforniaConsultants.org

• Patent application preparation, prosecution, IP Strategy • Enforcing, Licensing and Monetizing Patents • Broad Experience in many Electrical and Software arts • Our Experts: IEEE Fellow, SPIE Fellow, Technical and Legal Experts

Ph: 408-288-7588 www.StevensLawGroup.com

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1754 Technology Dr, #226 San Jose

Channel Partner

Multiphysics, Multidisciplinary Engng CFD, Stress, Heat Transfer, Fracture Fatigue, Creep, Electromagnetics Linear/Nonlinear Finite Element Analyses Multi-objective Design Optimization BGA Reliability

Ozen Engineering (408) 732-4665

[email protected] www.ozeninc.com

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January 2013 Vis i t us a t w w w . e - G R I D . n e t Page 4

ISSCC is the premier forum for the presentation ofadvances in solid-state circuits and systems-on-a-chip. The Conference offers a unique opportunity tonetwork with leading experts in the field.SUNDAY ALL-DAYTWO FORUMS: ● Advanced RF Transceiver Design● VLSI Power-Management Techniques10 TUTORIALS: ● 60GHz CMOS LNA Design ●High-Bandwidth Memory Interfaces ● EnergyHarvesting & Processing ● FinFET Circuits ● Data-Converter-Design Simulation ● On-Chip Voltage &Timing Diagnostics ● Robust SoC Design ●Wireless Transceiver System Design ● Voltage-Reference Design ● Data & Power ImplantTelemetry2 EVENING EVENTS: ● Graduate Student Researchin Progress ● Batteries Not IncludedTHURSDAY ALL-DAY4 FORUMS: ● Emerging Technology for Wireline● Scientific Imaging ● Frequency Generation &Clock Distribution ● Mixed-Signal/RF Design inFuture CMOSA SHORT-COURSE on RF Blocks for Wireless Tx/Rx

Providing ANSYS simulation software, training,technical support and consulting services. OurFEA experts take pride in delivering accurate &dependable finite element analysis (FEA) andcomputational fluid dynamics (CFD) simulations.

Upcoming Training Courses in Sunnyvale:ANSYS Icepak (Feb 11-13)ANSYS Icepak is software specifically focused for theelectronics industry for package, board or system-levelneeds. Its specialized macros and features allow analyststo quickly set up industry simulations and confidentlymanage the thermal characteristics. This class introducesCFD concepts before going into specific features andapplications.

ANSYS Workbench Simulation (Feb 21-22)An intuitive up-front simulation tool that is used inconjunction with CAD systems. Provides a basicunderstanding of simulation concepts and interpretation ofresults. For engineering professionals new to ANSYSsimulation products.

MONDAY THROUGH WEDNESDAYFive parallel technical sessions, including demosessions and a special-topic session.60th anniversary distinguished evening panel onMonday night, plus 2 social hours for professionalnetworking and demonstration sessions.Technical Sessions on: Analog, Data Converters,Energy-Efficient and High Performance Digital,Memory, RF/Wireless, Wireline, Imagers, TechnologyDirections, MEMS, Medical and Displays, plus4 evening sessionsPlenary TalksLisa Su, Senior VP and General Manager, AMD“Architecting the Future: Heterogeneous Computing”Yoshiyuki Miyabe, Director and CTO, Panasonic“Smart Life Solutions from Home to Cities”Martin van den Brink, Executive VP/CTO, ASML,“Next Generation Lithography: Progress & Outlook”Carver Mead, Professor Emeritus, Caltech“The Evolution of Technology”Save on registration, through January 11th

Visit www.isscc.orgANSYS Simulation Software andEngineering Consulting Services

for Product Development

Intro to ANSYS Maxwell 2D/3D (Feb 25-26)Learn how to design and analyze 2D and 3Delectromagnetic and electromechanical devices such asmotors, actuators, transformers, sensors and coils.Includes "hands-on" workshops and exercises.

Intro to ANSYS Fluent (Feb 27-28)Introducion for the practicing engineer. As the leadingCFD software, ANSYS Fluent provides diverse andpowerful capabilities for CFD applications. Includes anintroduction to CFD simulation and moves on to setting upand solving turbulent flow and heat transfer problems.With "hands-on" workshops and exercises.

Courses are taught by experts who have extensiveANSYS application experience as well as FEA andCFD computer-aided engineering expertise.

See our complete training schedule for other classes.Visit:

www.ozeninc.com/trainingor email [email protected]

International Solid-State Circuits ConferenceFebruary 17-21, 2013 San Francisco

Theme: “60 Years of (Em)Powering the Future”

ENGINEERING, Inc

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January 2013 Vis i t us a t w w w . e - G R I D . n e t Page 5

Submitting a Paper to CLEO: 2013Choose Your Conference:CLEO: QELS-Fundamental Science is a descendentof the Quantum Electronics and Laser Science Conference(QELS), which has been traditionally collocated withCLEO. QELS has long been a leading venue forpresenting the newest research results in physics-relatedareas of optics, modern spectroscopy, atomic andmolecular manipulation and control, quantum optics,optical materials, interactions of electromagnetic radiationwith matter, ultrafast phenomena, and nonlinear optics.More recent additions include fields such as quantuminformation science, nanophotonics, and metamaterials.

CLEO: Science & Innovations is the "classic" CLEOwhich for over 36 years has reported applied researchresults on all types of lasers, optical materials, andphotonic devices. Topics include laser processing ofmaterials, terahertz technologies, high-field and ultrafastoptics, optical communications, biophotonics, opticalsensing and metrology, micro- and nano-photonics andnonlinear optics.

CLEO: Applications & Technology presents thetransition of fundamental and applied research innovationstowards products, including development anddemonstration of new components, systems andapplications of lasers and electro-optics technology.Emphasis is on pre-commercial or non-commercialtechnology validations in relevant environments, includingdemonstrations of component or breadboard systems in thelaboratory, prototype demonstrations in operationalenvironments, field test results, and engineering andmanufacturing advances (for example, space qualificationof lasers and components).

Abstract Submission Deadline:January 30, 2013

Fundamental Science● Quantum Optics of Atoms, Molecules and Solids● Quantum Science, Engineering and Technology● Metamaterials and Complex Media● Optical Excitations in Condensed Matter● Nonlinear Optics and Novel Phenomena● Nano-Optics and Plasmonics● High-Field Physics and Attosciences

Science and Innovations● Light-matter Interactions and Materials Processing● Advanced Science and Technology for Laser Systems● Semiconductor Lasers● Nonlinear Optical Technologies● Terahertz Technologies and Applications● Optical Materials, Fabrication and Characterization● Micro- and Nano-Photonic Devices● Ultrafast Optics, Optoelectronics and Applications● Components, Integration, and Signal Processing● Biophotonics and Optofluidics● Fiber, Fiber Amplifiers, Lasers and Devices● Lightwave Communications and Optical Networks● Active Optical Sensing● Optical Metrology● LEDS, Photovoltaics and Energy-Efficient Photonics

Applications & Technology● Biomedical● Environment/Energy● Government & National Science Applications● Industrial

For more information, visit:

www.cleoconference.org/submissions/ieeebayarea

Laser Science to Photonic ApplicationsTechnical Conference: June 9-14, 2013 Exposition: June 11-13, 2013

San Jose Convention CenterCALL FOR PAPERS

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January 2013 Vis i t us a t w w w . e - G R I D . n e t Page 6

Consulting Skills for Engineers:How to Become a Trusted Advisor

– Date/Time: Thursday, Feb 7, 9:00 AM – 5:00 PM– Location: – TIBCO Software, Palo ALto

Fee: $425 for IEEE Members; $525- non-members

“This class will tremendously impact your productivityand career development.”

Breakthrough Project Management– Date/Time: Tues-Wed, Feb 19-20, 9 AM – 5 PM– Location: – TIBCO Software, Palo ALto

Fee: $650 for IEEE Members; $725- non-members

This 2-day course provides participants with a commonmethodology, terminology and tools that produce moreefficient results and increased buy-in through improvedvisibility, reliability and consistency.

"The methods and processes used for this classwere not just tools and packages. They were a wayto approach, manage and think, as well ascommunicate and deliver projects with lessfirefighting. I particularly liked the flexibility matrix,POS, risk analysis and critical path analysis."

.

SharePoint Comes Back to San Francisco!Join the top minds in the SharePoint universe – the

Microsoft engineers who developed the software, andthe MVPs who are experts in the technology. Walkthrough the new features of SharePoint, its excitingcapabilities and best-practices migration paths.Attend classes and workshops to help you get themost out of your SharePoint implementation. New toSharePoint? The technical classes and workshops atSPTechCon are focused on practical techniques andpractices you can put to work today. Take only theworkshops and classes that work best for you.

Exhibit Hall Hours:Tuesday, March 5 – 11 AM – 7:00 PM

Wednesday, March 6 – 10:45 AM – 4 PM“A great conference to learn and network with real-worldimplementors. All of the speakers have blogs that I followand spending face-to-face time with them is invaluable.”

Steve Tieland, Sr. Software Engineer, Old Mutual US

SCV Chapters, Technology Management & Components,Packaging and Manufacturing Technology Societies

Management Essentials– Date/Time: Mon-Tues, March 11-12, 9 AM – 5 PM– Location: – TIBCO Software, Palo Alto

Fee: $650 for IEEE Members; $725 non-members"Thank you!! I wish I could have had this knowledgealong time ago when I first became a supervisor."

-Sales Operations Supervisor, @Road

Clear Business and E-Mail Writing– Date/Time: Mon-Tues, May 9, 9:00 AM – 5:00 PM– Location: – TIBCO Software, Palo Alto

Writing, revising exercises, critiquing documents, games,and lecture. You will walk away with confidence in yourskills to craft documents and emails that drive business bycreating concrete, actionable outcomes.

Upgrade your skill set – prepare for future challengesFor complete course information, schedule, andregistration form, see our website:

www.EffectiveTraining.com*

March 3-6, 2013San Francisco Hilton90+ Technical Classes

Keynotes, Exhibits, moreEight Full-day Workshops:- Building Apps for SharePoint 2013- Best Practices for a Records-Management Deployment- SharePoint 101: Jump-Starting the Developer - and more

Technical Classes:- How to Install SharePoint 2013 Without Messing It Up - TenBest SharePoint Features You’ve Never Used - Converting anE-mail Culture into a SharePoint Culture - Solving EnterpriseSearch Challenges - Creating Data-Centric Composite Apps- Creating a Great User Experience in SharePoint - SharePointData Anywhere and Everywhere - What’s new with Workflowin SharePoint 2013 - The Essentials of SharePoint DisasterRecovery - Using SharePoint for Business Process Management- Introduction to Visio Services… plus dozens more

Free exhibits pass.Use code "IEEE" for $100 discount on 3-, 4-day reg’nsEarlybird registration through Jan 18 (save $400)

For information and to register, visit

www.SPTechCon.com

IEEE Professional Skills Courses

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LeadingInnovation and Quality

in Electronic DesignKEYNOTES

TECHNICAL SESSIONSISQED Technical sessions start on Tuesday March 5, and continue until the afternoon of Wednesday, March 6. Beside the above plenary sessions, and workshops, the program consists of 22 technical sessions featuring over 100 papers on various challenging topics. A partial list of topics is shown below. Detail program would be available on the web at www.isqed.org.

REGISTRATIONPlease refer to ISQED web site at www.isqed.org for information regarding the tutorials, conference, and hotel registration. Direct all conference inquiries to [email protected]. Early registration is recommended to take advantage of the discounted registration fee.

Chenming Hu - TSMC Distinguished Professor in Graduate SchoolUniversity of California, BerkeleyRobert Hum - Vice President and General Manager, Deep Submicron Division, Mentor Graphics Brad L Brech - Member of the IBM Academy of Technology, IBM Bill Swift , Vice President, Engineering Shared Services and Transceiver Module Group, Cisco

IC Design at New Nodes Made EasyAlvin Loke - AMD3D Design of ICs: From Concept to Practice Sung Kyu Lim - Georgia Institute of Technology 3Design of On-chip Optical Chips for Blazing SpeedRon Ho - OracleComputer Architecture Design Utilizing Novel Memories Engin Ipek - University of Rochester Holistic Power ManagementVinod Viswanath - RealintentRajeev D. Muralidhar - IntelHari Seshadri - Intel

TUTORIALS/WORKSHOPS

VENDOR EXHIBITIONISQED2013 Exhibition floor will be open on Tuesday March 5 from 12 noon, and includes technical poster presentations in afternoon. Exhibition floor attendance is free but needs advance on-line registration (see registration information on the web)

ISQED 2013, 14th International Symposium & Exhibits on

QUALITY ELECTRONIC DESIGN

www.isqed.org

March 4-6, 2013Techmart Center, Santa Clara, CA, USA

ISQED2013 corporate sponsors are IBM, Mentor Graphics, and InnovoTek

ISQED AwardsISQED Award ceremony will be held during Tuesday March 5 luncheon. Best papers will be also announced during the same session.

3rd Interdisciplinary Engineering Design Education

Conference - IEDEC2013

March 4-5, 2013. Santa Clara, CA, USAEducation Society

The Interdisciplinary Engineering Design Education Conference is a premier event committed to further the education in engineering design with the ultimate goal of improving the quality of engineering designers worldwide. The conference is intended for educators, mentors, engineers, managers, researchers, students, as well as industry companies and consortiums that desire excellence in interdisciplinary engineering education and have created or need to create interdisciplinary programs and products. IEDEC strives to promote the engineering design profession and to highlight the important role of engineering in all aspects of human life. The conference provides a forum for sharing ideas; learning about developments in engineering design education; and interacting with professionals, experts, and colleagues in the field.

Keynote Speakers

Prof. S. Shankar Sastry - Dean of the College of EngineeringUniversity of California at Berkeley

Technical Presentations

IEDEC program includes 40 technical presentations by experts worldwide.

Conference Registration & InformationVisit conference website at www.IEDEC.org for information about the program, registration, and hotel reservation. IEDEC2013 is held in technical spon-sorship of IEEE Education Society.

www.SensorsCon.org

www.IEDEC.org

The conference on Sensors - Technology, Design, and Applications (SensorsCon) is a forum to present, highlight and discuss the latest research, develop-ment, application, and business opportunities in sensors technology and applications in various fields.The market for sensors and related technologies is expanding at a phenomenal rate. The conference brings together researchers, developers, and practitioners from diverse fields including scientists and engineers, research institutes, and industry.

*** 3 Exciting Events in One Location, Techmart, Santa Clara, March 4-6 ***

1

2

3

January 2013 V is t us a t www.e -gr id .ne t Page 7

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January 2013 V is i t us a t w w w . e - G R I D . n e t Page 7

Hot Topics Include: • Cloud and Data Center Networking • 100G/400G Network Design and Optimization • Space Division Multiplexing • Flexible Grid Networks • 1Tb and Beyond Optical Networking • Wavelength Agile Access Networks • Convergence of Optical and Wireless Networks • Virtualization and Software Defined Networks (SDN) • High-Speed Photonic Integration for Coherent Detection ... and MUCH more

Technical Conference 17-21 March

Exposition 19-21 March

Anaheim Convention Center

If you work in Access/FTTx; Optical Grids; Datacom; Carrier/Transport/Telecom; High-

performance Computing Test and Measurement; Green Technology; or any optical communications field, this is the one event you can’t afford to miss.

Save, through 19 February

For 24-page Advance Program, registration:

www.ofcnfoec.org

Optical Fiber Communication Conference and Exposition and

the National Fiber Optic Engineers Conference (OFC/NFOEC)

the technology of the future

at today’s leading event Sponsored by: ®

Attend the world's leading event for advancing optical solutions

in telecom, datacom, computing and more! • World's Largest Optical Fiber Exhibition with 550+ Exhibitors & Extensive Show Floor Business

Programming

• 750+ Technical Presentations in 14 Categories

• 22 Interactive Workshops on The Industry's Hottest Topics

• Business trends, insights and analyses by leaders in the field at the Service Provider Summit and Market Watch

• Plenary Session with Nick McKeown, Professor of Electrical Engineering and Computer Science, Stanford University, USA; Brian Protiva, CEO, ADVA Optical Networking, Germany; and Caio Bonilha, President and CEO, Telebras, Brazil

• Two Special Symposia: Enabling the Cloud and Convergence of Wireless and Optical Networking

• Rump Session: Silicon Photonics: Disruptive Technology or Research Curiousity?

• Up-To-The-Minute Research Presented in Post-Deadine Sessions

• Extensive Short Course Program and Tutorials with Reviews of Important Progress in Research

• Networking Opportunities with 12,000+ Attendees from 65 Countries

• 550+ Peer-Reviewed Technical & 120+ Invited Presentations

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January 2013 Vis i t us a t w w w . e - G R I D . n e t Page 8

January 28 - 31, 2013Santa Clara Convention Center-- 100+ technical paper sessions in 14 Tracks

-- 100's of design tools & solutionsDesignCon brings together leading engineers andorganizations presenting EDA tools, test andmeasurement equipment, PCBs and relatedtechnologies, semiconductor components and IP,interconnect technologies, and more. Papers discusscutting-edge case studies, technology innovations,practical techniques, design tips and applicationoverviews.

DesignCon Tracks: 1. Chip-Level Design forSignal/Power Integrity 2. Analog, Mixed-Signal, andRF Design and Verification 3. Designing withProgrammable Architectures 4. System Co-Design:Chip/Package/Board 5. PCB Materials, Processing andCharacterization 6. PCB Design Tools andMethodologies 7. Parallel and Memory Interface Design8. High-Speed Serial Design 9. Jitter, Crosstalk, andNoise Analysis 10. High-Speed Signal Processing,Equalization and Coding 11. Power Integrity andPower Distribution Network Design 12. Electro-magnetic Compatibility and Interference 13. Test andMeasurement Methodology 14. Signal PropagationAnalysis Techniques

10 Half-Day Tutorials include: – A Study onCrosstalk Impact on System SNR and BER – Methodsof Improving 3D EM Model Development andAssociated Time/Frequency-Domain Measurements– Modeling High-Speed Interconnect for the the SignalIntegrity Engineer: Tips, Tricks, and Trade-Offs – ATETest Fixture Design for High-Speed Digital Applications– Design and Verification for High-Speed I/Os atMultiple to >40 Gbps with Jitter, Signal Integrity, andPower Optimization (and more)

Plus: 130+ exhibitors showcasing a wide variety ofadvanced design tools – Free panel discussions,speed-trainings & product teardowns – DesignTOURprizes and giveaway – Happy Hours – DesignVisionand Best in Test Awards …and more.

Sponsors:

The premier event developedfor engineers by engineers

This is your one-stop shop to upgrade yourknowledge and skills with the latest theoretical designtechniques and methodologies while seeing first-handdemonstrations of today's most advanced designtools and technologies.

Keynotes:Bill SwiftVice President of EngineeringCisco Systems

Jonah AlbenSenior VP of EngineeringNVIDIA

Mike SantoriBusiness and Technology FellowNational Instruments

Attending DesignCon will enable you to meet andinteract with industry professionals and technicalexperts in similar roles and organizations around thecountry. You gain valuable information and insights, anunderstanding of what our peer organizations aretalking about and planning for, and how they areaccomplishing certain goals or tackling specificchallenges that are similar to our own. The four days atDesignCon is the most cost-effective educational andtraining choice you can make all year. You willexperience a full year of benefits in the form of new andgreater knowledge and practical skills and techniquesthat you can apply directly to your job.

Every year, thousands of engineering professionalsmake the decision to start the year off right withDesignCon.

Free Expo pass – Admission toChiphead theater, special events,keynotes and exhibits.

Advance Pricing through January 18th!Group Discounts for groups of 5 or more.20% discount with promo code IEEE20

For full Conference Program andregistration information:

www.designcon.com

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Have you ever wanted to continue your education inengineering while you continued working? Santa ClaraUniversity’s School of Engineering offers graduatedegree and non-degree programs to both full-timestudents and working professionals. Simplifiedregistration for the Winter Open University. Graduate-level instruction. Up to 16 units may be transferred to agraduate-degree program.

Early-morning classes:- Probability - Database Systems - Linear Control Systems- Analog ICs - Energy Transmission and Distribution- Active Microwave Devices (and more)

Evening classes:- Linear Algebra - Intro to Nano-Bioengineering - VLSIDesign - Computer Architecture - Network Management- Logic Design using HDL - Robotics (and more)

Saturday classes:- Secure Coding in C and C++ - Project Risk Management- Gender and Engineering (and more)

Email LeAnn Marchewka with inquiries:[email protected]

At ESI, we understand the increasingly important rolemultiphysics plays in product design, and the need youhave for realistic simulation solutions. Would you like togain insight into your projects from conception tocompletion? With our unique suite of products you can dojust that ... the ideal choice for real world simulation.Join us for a seminar series on multiphysics modeling thatwill show you how to unlock your product innovation, whileusing real world examples – not simplified concepts. ESIexperts will guide you through the theory and application ofan industrial solution that takes advantage of the ACE+Suite of simulation tools.You will leave the seminars ready to explore the world ofmultiphysics available in the ACE+ Suite. Please bring acomputer, and we will install a trial license for you at nocharge. Overviews and tutorials can be explored at yourown pace during the hands-on session afterward with thehelpful guidance of an ESI application engineer. Thoseinterested in CFD simulation in any field are welcome.

Each workshop is free; but seating is limited.For details and registration, visit:

www.esi-group.com/corporate/events

Prepare for that nextproject or assignment!

To remain competitive in Silicon Valley's changingenvironment, engineers need to update their knowledgebase. The School of Engineering offers professionalCertificates and Open University programs, as well asgraduate degrees, for those who are driven to becomeleaders in their fields.

Registration is now open Classes begin January 7

Located in the heart of Silicon Valley, with easy parking

Review winter Open University courses:

www.scu.edu/engineering/graduate

DoubleTree Hotel, San JoseSeminar 1: 8:45 AM - Noon, February 20th:Semiconductor Process Design & Optimization● Introduction to ACE+ Multiphysics Simulation Suite● Semiconductor Process Modeling with ACE+ Suite

• Deposition, Etching incl CVD, MOCVD, MOVPE, ALD • Plasma-Enhanced Processes incl PECVD, Dry Etch • Feature-Scale Modeling● Hands-on Workshop (Optional)

Seminar 2: 8:45 AM - Noon, March 20th:Flow-Thermal-Mixing Modeling for Designers● Introduction to CFD-CADAlyzer and ACE+ Solver •Overview of CAD Import and Meshing •Problem Set-up and Design Analysis● Flow Thermal Mixing analysis

for Semiconductor Processes • Showerhead Design • Rotating Speed of the Susceptor • Wafer Heating (Resistive, Radiative, Inductive) • Gas Mixing/Purge Cycle● Hands-on Workshop (Optional)

Santa Clara University School of Engineering Graduate Programs

SCU Winter Open University

CFD Multiphysics SeminarsSemiconductor Process Design and Optimization

Flow-Thermal-Mixing Modeling for Designers

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The Dark Side of "Agile"Speaker: Brian Lawrence, Principal, Coyote Valley

SoftwareTime: Networking at 6:00 PM; Management Forum

at 6:30 PM, Dinner at 7:15 PM; Presentationat 7:45 PM

Cost: $11 for members, $14 for non-membersPlace: Ramada Hotel, 1217 Wildwood Ave.,

SunnyvaleRSVP: from websiteWeb: www.ieee-scv-tmc.org

Brian Lawrence of Coyote Valley Software is asoftware consultant with a long history in thecomputing industry. His primary focus is teaching andfacilitating requirements activities, as well asinspection, project planning, risk management, lifecycles, and design specification techniques. Brianhas served as the editor of what is now BetterSoftware Magazine, sat on the editorial board ofIEEE Software for 5 years, and has chairedconferences. He taught software engineering at theUniversity of California Santa Cruz Extension for overa decade.

Agile software development has enjoyed risingpopularity for over 10 years. And yet, many peoplestill have misgivings. Come hear this original talkfrom someone who was there from the beginning,and who knows the strengths and weaknesses ofchoosing an agile approach.

THURSDAY January 3, 2013SCV Technology Management

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How the Race for MicroprocessorLeadership Transformed

Silicon Valley:70's, 80's, and 90's

Panelists: David House from Intel; John Mashey fromMIPS; Anant Agrawal from Sun

Moderator: John Hollar, CEO, Computer HistoryMuseum

Time: Buffet dinner at 6:30 PM; Panel followsCost: $22 for IEEE members; $25 for non-

membersPlace: Computer History Museum, 2960 North

Shoreline Blvd, Mountain ViewRSVP: from websiteWeb: ieeescvlifemembers.eventbrite.com

This panel will discuss microprocessordevelopment in the 70's, 80's and 90's including theevolution of CISC and RISC architectures and thebattle for architectural dominance in the market place.The technological developments that led up to thecreation of RISC architectures and the reaction ofCISC suppliers to address this attack with becovered. The role of architecture in today'smarketplace will be discussed and the panelmembers will share their views on the factors thatlead up to the outcome of these architectural wars.They will also share their personal stories that havenot been published before and how they managedthe innovations.

Note: Space is limited and only the registeredguests will be admitted. Early registration is highlyrecommended.

MONDAY January 7, 2013SCV Life Member Affinity Group

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Practical Mesh Networksfor Sensor Networking

Speakers: Thomas Watteyne, Dust Networks, andRoss Yu, Linear Technology

Time: Registration & Networking at 6:30 PM,Presentation at 7:00 PM

Cost: $5 for light dinner; Free to attendpresentations only

Place: Texas Instruments Building E, 2900Semiconductor Dr., Santa Clara

RSVP: from websiteWeb: ewh.ieee.org/r6/scv/comsoc

Thomas Watteyne is aSenior Networking DesignEngineer at DustNetworks/Linear Technology, acompany specializing in ultra-low power and highly reliableWireless Sensor Networking.He designs networkingsolutions based on a variety ofM2M standards and promotes the use of highlyreliable standards such as IEEE802.15.4e. Prior toDust Networks, Thomas was a postdoctoralresearcher at the University of California, Berkeley,working with Prof. Kristofer Pister. He createdBerkeley’s OpenWSN project, an open-sourceinitiative to promote the use of fully standards-basedprotocol stacks in M2M applications. He obtained hisPhD in Computer Science (2008) and MSc inTelecommunications (2005) from INSA Lyon, France.

Ross Yu is the ProductMarketing Manager at LinearTechnology for the DustNetworks product line. Mr. Yuand his team at Dust Networkshave made significantcontributions to solving thechallenges inherent in theexciting field of wireless sensornetworking, and Mr. Yu has been instrumental inbringing to market the industry’s most reliable andlowest-power wireless mesh sensor networkingsolutions. Mr. Yu holds a Bachelors of Sciencedegree and a Masters of Engineering in ElectricalEngineering and Computer Science from theMassachusetts Institute of Technology.

Our December 2012 meeting focused on howpushing connectivity deeper into meters, appliancesetc. would affect the energy industry. This meetingcontinues the theme of the internet going beyondpeople to interconnecting things and takes a morefocused look at usage of multi-hop wireless as a wayto do this. The speakers are from a UC Berkeleyincubated startup Dust Networks, which is now a partof a long-standing Silicon Valley company, LinearTechnology. After speakers’ presentations, there willbe a moderated panel session followed by audienceQ and A.

Blending Highly Efficient IEEE802.15.4e Low-Power Mesh Networks into the Internet

Thomas Watteyne from Dust Networks (LinearTechnology) will highlight the challenges faced bywireless multi-hop networks, before showing howcommunication protocols and standards can addressthese. Thomas will cover use cases, examples andlessons learnt from open-source and commercialimplementations. His talk will touch on severalstandards that target reliable operation of wirelessmulti-hop networks (WirelessHART, IEEE 802.15.4e,IETF RPL) and how they can integrate within theInternet (IETF 6LoWPAN, CoAP).

Reliable, Low Power Wireless Sensor Networks inPractice

Ross Yu, also from the Dust Networks product linefrom Linear Technology, will talk about how TimeSlotted, Channel Hopping (TSCH) wireless networkshave enabled mesh solutions to deliver unmatchedreliability, low power and scalability. He will highlightseveral end-user applications that were madepractical with TSCH solutions.

Session Moderator: Tim Colleran, Director ofMarketing, Internet of Things Business InitiativeQualcomm Atheros Inc.

Session Organizer: Narasimha Chari (CTO TroposNetworks) & MP Divakar, Comsoc SCV Secretary

WEDNESDAY January 9, 2013SCV Communications

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New Class of Low-k Dielectrics for Advanced Interconnects

Speaker: Yusuke Matsuda, Materials Science and Engineering, Stanford University

Time: Optional dinner at 6:00 PM; Presentation at 6:45 PM

Cost: $20 for dinner ($10 for students, unemployed); no cost for presentation

Place: Biltmore Hotel, 2151 Laurelwood Rd, Santa Clara

RSVP: from website Web: www.cpmt.org/scv

Yusuke Matsuda is a PhD candidate in the department of materials science and engineering at Stanford University. He received his bachelor’s and master’s degrees from Tohoku University, Japan. Before joining Stanford University, he worked as a reliability engineer in the R&D division at Hitachi Global Storage Technologies. His current research interests are the mechanical properties of advanced materials from hybrid materials to nanocomposites to nanolaminates for emerging nanoscience and energy applications. Dr Matsuda is a recipient of the IEEE CPMT-SCV graduate grant for Fall 2012.

Low-k dielectrics in microelectronic interconnects

play a crucial role in increasing device performance and lowering power consumption. Silica-based low-k dielectrics are fragile, and have low device yield in packaging and limited reliability from cohesive or interfacial fracture caused by thermo-mechanical and packaging stresses in the interconnect structures. This is further aggravated in reactive environments like moisture or CMP slurries. These issues may be addressed by replacing Si-O-Si bonds with less reactive molecular networks to dramatically increase device reliability.

Here, I present new silicon carbide-based low-k dielectrics containing no Si-O-Si bonds. These can be processed using available techniques, and exhibit excellent and widely tunable thermo-mechanical properties, as well as significant reduction of moisture-assisted cracking. These dielectrics can replace traditional silica-based low-k dielectrics in advanced interconnects, leading to a better damage tolerance, increased reliability and yield during packaging, chip stacking and TSVs processes.

WEDNESDAY January 9, 2013

SCV Components, Packaging and Manufacturing Technology

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CommercializingNanoelectronics: Opportunities

in Material and Life SciencesSpeaker: Mark Bunger, Research Director, Lux

Research Inc.Time: Registration & light lunch 11:30 AM;

Presentation at 12:00 NoonCost: IEEE Members and Students $5; Non-

Members $10Place: Texas Instruments Bldg E-1 CMA Room,

2900 Semiconductor Dr, Santa ClaraRSVP: from websiteWeb: www.ieee.org/nano

Mark Bünger is a Research Director at LuxResearch. Based in the firm's San Francisco office,Mark currently leads the Alternative Fuels, Bio-basedMaterials and Chemicals and Targeted Deliverypractices. He joined Lux Research with 14 years ofbusiness strategy experience, both as a managementconsultant and technology analyst. Previously, Markwas a Principal Analyst at Forrester Research, anInternational Engagement Manager at Europeanconsultancy Icon Medialab, and a Managing Directorof Icon Medialab's U.S. office. The first six years ofMark's career were spent at Accenture in the U.S.,U.K., and Sweden. Mark's education includesInternational Marketing at Mälardalen Polytechnic inSweden, and Market Research at the University ofTexas in the U.S. He also studied biochemistrythrough the University of California at Berkeley'sextension program and currently works in the Centerfor Quantitiatve Biology at the University of California,San Francisco.

Printed electronics promises the ability tomanufacture devices through low-cost, high-throughput manufacturing with novel materials andinks. Three materials areas – opaque conductiveinks and pastes, transparent conductors, andsemiconductors -- present a total opportunity ofnearly $3 billion in 2017. Opaque conductive inks area leading segment, with medical and RFID among thefastest-growing applications; ITO replacementtransparent conductive films will come from a singleapplication: smartphone touch screens. Inhealthcare, this presentation will assess emergingsensor, treatment, and electrode technologies acrosseight markets to uncover business opportunities forprinted, flexible, and organic electronics.

TUESDAY January 15, 2013SCV Nanotechnology

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Building and Scaling Nerd Communities:

Hacker Dojo and Dev House

Speaker: David Weekly, Hacker Dojo Time: Meeting and Presentation at 7:00 PM Cost: none Place: Agilent, 5301 Stevens Creek Blvd., Santa

Clara RSVP: not required Web: www.CaliforniaConsultants.org

David Weekly is is a hacker who likes people. He is the Founder and CEO of Oha.na, a soon-to-be released service to connect extended families through visual newsletters. David also founded PBwiki (now PBworks), and as its CEO built one of the web's largest private collaboration platforms that is used by over four million people a month.

David is a Founding Director of Mountain View's Hacker Dojo, the world's largest hackerspace. He is also a Founding Partner of Mexican.VC, Silicon Valley's first seed fund for Mexican internet startups.

David has been programming since he was five, and graduated from Stanford with a degree in Computer Science as a President Scholar. He has worked in such widely varying technology environments as Harvard Physics Labs, MIT Lincoln Labs, Stanford Graphics Labs, atWeb (acquired by Netscape), myplay (acquired by Bertelsmann), Legato (acquired by EMC), and There.com (where he worked with Eric Ries, the inventor of The Lean Startup methodology).

David has served as an advisor to dozens of technology companies, including Plaxo (acquired by Comcast), Attassa (acquired by YouSendIt), and Like.com (acquired by Google).

Much of Silicon Valley's strength as an innovation

center is due to its warm and welcoming community of engineers. Communal institutions and get-togethers have formed a critical part of both academic and commercial environments. The founding of Apple from the Homebrew Computer Club is one classic example, but less well known is that Pinterest was formed at Hacker Dojo.

This talk will describe the origins and evolution of Super Happy Dev House, its spread across the world (and Mexico in particular), and its evolution into Hacker Dojo. This story includes 2012's struggles with the City of Mountain View and the institution's ultimate move to a larger facility, its fundraising efforts, and its ongoing experiments in community management.

TUESDAY January 15, 2013

SCV Consultants' Network of Silicon Valley

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LTE Components DriveMultimode Mobile Broadband

Speakers: Stephen Turnbull, Division MarketingManager, Freescale Wireless AccessDivision; Michael Christofferson, Director ofProduct Management, Enea

Time: 11:00 AMCost: nonePlace: On the InternetRSVP: from websiteWeb: spectrum.ieee.org/webinar/2139648

Stephen Turnbull, DivisionMarketing Manager at FreescaleWireless Access Division, isresponsible for Freescale's wirelessaccess portfolio which encompassesboth discrete and fully integrated SoCbase station solutions including QorIQmulticore processors, StarCore DSP basebandprocessors and the QorIQ Qonverge, base stationSoC family. Stephen and his team drive all elementsof the definition and marketing of Freescale'sscalable, wireless base station solutions includingboth silicon and software.

Stephen joined Motorola Semiconductor/Freescale in 1984 and throughout his career has heldpositions of increasing responsibility spanningmaterials, marketing, sales, engineering and productmanagement. Prior to his current role Stephenserved as Global Operations Manager for multicoreprocessors; before this he was based in Europe andheld the role of EMEA Operations Manager forCommunications Processors.

Stephen holds a Bachelor of Science degree fromStrathclyde University and a Master of Sciencedegree from Napier University.

The availability and performance of LTEcomponents are becoming a critical issues as carriersmove ahead with LTE deployments. Highlyintegrated devices using the latest silicon technologyare transforming this market. At this critical time wetake a look at the latest solutions involving LTE forcellular base stations as well as the emerging HetNet(heterogeneous networks) technology to provide thefully integrated coverage and bandwidth that areneeded in next-generation mobile infrastructureequipment.

Michael Christofferson, Director ofProduct Management at Enea, has over30 years experience in softwaredevelopment for deeply embeddedsystems and telecom networkingsystems. He spent the first 8 years ofhis career with Raytheon in DefenseCommunications, specifically with remote controlledsignal and communications intelligence systems(SIGINT/COMINT). That was followed by 8 years inthe Telecom/Datacom market working for suchcompanies as GTE Telecom, Sprint, Data GeneralTelecommunications, and Pulse Communications.For the past 14 years, Mr. Christofferson has movedinto sales, marketing, and business development forleading industry RTOS, embedded developmenttools, and middleware providers. These have beenReady Systems, then Microtec, then MentorGraphics, and now finally Enea for whom he hasserved since 1998. He is currently Director ofProduct Management at Enea. Mr. Christoffersonreceived a B.S. in Physics from Bradley University in1972, and an M.S. in Physics from the University ofMichigan in 1974.

WEDNESDAY January 16, 2013SPECTRUM Magazine

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Bowling Night with the IEEETime: Please arrive before 6:30 PMCost: $10 for members; $12 for non-members

(includes shoes, bowling, pizza)Place: AMF Mission Lanes, 1287 S Park Victoria

Dr, MilpitasRSVP: from websiteWeb: www.ieee-scv-gold.org

Come join IEEE SCV GOLD for Bowling Night.Come out to network with your fellow Bay Areaengineers!

No refunds, and no walk-ins allowed.Please arrive before 6:30 PM so that you can start

on time! There will be 2 hours of bowling (includesshoe rental) and pizza and soda will be served.

MONDAY January 21, 2013SCV Grads of the Last Decade (GOLD)

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Annual CES Download

Panelists: Gary Sasaki, President, DIGDIA; Tom

Coughlin, President, Coughlin Associates; Mike Demler, Editor-in-Chief, EE DailyNews

Time: Pizza + Drinks, Networking at 6:30 PM; Presentations and questions at 7:00 PM

Cost: IEEE members - $5; non-members - $10 Place: NVIDIA, Building E, 2800 Scott Blvd.,

Santa Clara RSVP: from website Web: www.ieee.org/scvce

Gary Sasaki - President of DIGDIA (www.digdia.com), a market analysis and consulting firm focused on markets enabled by digital media. Focus areas have included 3D, Digital Cinema, Consumer Electronics, Digital Cable, Digital Signage and an recently an area that is undergoing a dramatic change - Network-based Gaming (i.e. Slot Machines). Gary was also a past Chairman of the IEEE CES Santa Clara Valley chapter, and is currently on the chapter's executive team.

Tom Coughlin - President of Coughlin Associates

(www.tomcoughlin.com), a market analysis and consulting company focused on storage technology used in a variety of areas, including consumer electronics. Tom also runs the Storage Visions conference, held each year just before CES in Las Vegas, and also the Creative Storage conference. Tom is also a past Chairman of the IEEE CES Santa Clara Valley chapter, and is currently on the chapter's executive team.

Mike Demler - Editor-in-Chief EE DailyNews

(www.EEdailynews.com), and Editorial Director for DSP-FPGA.com. Mike has had a focus on mobile devices and services. This focus includes 4G and tablets.

This is one of our more popular meeting topics - a

look at some of the latest and greatest, and sometimes weirdest new products shown at the Consumer Electronics Show. Both Gary and Tom have attended CES for over a decade each, and both are in Las Vegas for ten days covering a wide variety of topics. Their experience and insight always adds depth and color to the commentary. Mike has also attended many CES and brings his perspective on mobile topics.

TUESDAY January 22, 2013

SCV Consumer Electronics

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Resonance Study of a Coupled Mechanical Oscillator - Part 2:

Model and Analysis Speaker: Ghulam Mustafa, Ph.D., Crossing

Automation, Inc. Time: Presentation at 6:30 PM Cost: none Place: Intersil Corp., 1001 Murphy Ranch Road,

Milpitas RSVP: from website Web: sites.ieee.org/scv-css

Ghulam Mustafa manages the Reliability Engineering and System Characterization Group at Crossing Automation, where he is responsible for overall system reliability and performance measurement. Prior to joining Crossing, he worked at United Technologies Research Center where he developed life-cycle models for new technology development, reliability models for hydrogen fuel cells and noise reduction in jet engines. He has worked on wafer handling robots/automation systems for the past ten years and semi-conductor capital equipment for the past eighteen. In one of his previous lives, he designed and installed wind mills (now he only fights them). Currently, he is involved with implementing modular design methods for 450mm wafer handling systems, of particular interest to him are areas of testing, characterization and system identification for health monitoring, failure prevention, and predictive preventive maintenance. His areas of interest include system dynamics, measurement, control and all aspects of product reliability, and robust design. Nonlinearity has always held a special place, whether he is testing a robot or watching the leaves flutter in the wind.

Part 1 of the talk (see Nov 28, 2012) focused on

the experimental observations as the oscillator is forced through two different resonance zones. Part 2 will cover the modeling and analysis based on the experiment.

WEDNESDAY January 23, 2013

SCV Control Systems

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IEEE WIE/Google Conference:Enhancing the Sustainability of

Women in TechnologySpeakers: Megan Smith, VP of New Business

Development, Google; Dr. Karen Panetta,Editor-In-Chief, IEEE WIE Magazine;Jelena Pjesivac-Grbovic, Google; RaquelRomano, Google; and 8 more

Time: 8:00 AM Wednesday through 3:00 PMThursday

Cost: none (includes 2 lunches, reception)Place: Google Headquarters, 1600 Amphitheatre

Pkwy, Mountain ViewRSVP: from website (seating is limited)Web: ieee-googleevent.eventbrite.com

Networking Reception: Wednesday, 5:00 - 7:00 PM

IEEE Women in Engineering (WIE) and Googlecordially invite you to participate in our joint event on“Enhancing the Sustainability of Women inTechnology” to be held January 23rd and 24th, 2013at Google's offices in Mountain View, California.

The conference will feature keynote speakers fromGoogle and IEEE's leadership who will give talks ontechnical topics including Cloud Computing, FaultTolerant Computing, and Technology Standards. Inaddition, sessions on leadership and professionalskills development and organizing professionalactivities will be of immense value to both earlycareer and advanced career attendees.

Welcome on behalf of the Program Co-Chairs:Ramalatha Marimuthu

Welcome Address: 2013 IEEE Region 6 DirectorMichael Andrews

Keynote Address: Megan Smith, VP of NewBusiness Development, Google

IEEE Women in Engineering: Dr. Karen Panetta,Editor-In-Chief, IEEE WIE Magazine

Google Cloud Ecosystem for the next-genInternet: Jelena Pjesivac-Grbovic, Google

Data Analysis Tools (iMapReduce, Pregal,Dremel, more): Lamia Youseff, Google

Technology Benefiting Humanity: RaquelRomano , Google

Lunch Talk: Innovating Research: Solving Real-World Problems: Ramalatha Marimuthu

Dr. Jeffrey Voas, National Institute of Standardsand Technology, IEEE Reliability Society

Fault Tolerant Computing/Detection andIsolation: Jenni Si, IEEE Computational IntelligenceSociety Liaison, Professor of Arizona State University

You as the Role Model: Pamela Jones, IEEE WIEComputer Society Liaison

Innovating Your Career. How to Land YourDream Job? Miche Baker-Harvey, Google

In Search of Diamonds: Jim WatsonPanel: Can WIE have it all? Life Balance/Best

Practices: Sue Shimoyama, VP Global SalesOperations, Rockwell Automation; Petra Wagner,Project Director, FLUOR Corp; Sheryl Chamberlain,Senior Director Operations, EMC; Mary Pat Farrell,VP Sales, Rockwell Automation

WED - THURS January 23-24, 2013SCV Women in Engineering

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Packaging for theCloud Computing Era

Speaker: Ilyas Mohammed, Principal Technologist,Invensas

Time: Registration at 11:30 AM; Buffet lunch at11:45; Presentation at 12:15 PM

Cost: $15 for lunch ($5 for students, unemployed);no cost for presentation

Place: Biltmore Hotel, 2151 Laurelwood Rd, SantaClara

RSVP: from websiteWeb: www.cpmt.org/scv

Ilyas Mohammed is a Senior Director andPrincipal Technologist at Invensas. He works onidentifying future technological challenges andcreating solutions through innovation and research.He received his Ph.D. from the University of Texas atAustin and B. Tech. from the Indian Institute ofTechnology, Madras, India, both in AerospaceEngineering. He has numerous publications and 25US patents.

Computing is trending towards multi-coreprocessors with multi-channel and high-bandwidthmemory, low power and mobile devices, and centrallylocated and managed servers. This trend hasbrought into focus -- at least on the digital side -- aneed for a high performance processor-memorysubsystem and an efficient and large-capacitymemory solution. There are many packagingsolutions being put forward, ranging from processorswith TSVs bonded to wide IO memory to stackedmemory cells with TSVs. Even though TSVs promiseto offer a substantial increase in performance, thereare many manufacturing, reliability and infrastructureissues. It would be appropriate to consider how muchof the promised TSV performance can be achievedthrough advances in conventionally manufactured 3Dpackages.

Two solutions, BVA PoP and xFD, are discussedthat address the processor-memory bandwidth andmemory density issues. Bond Via Array (BVA) PoPconsists of a processor package with free-standingwire-bonds that act as high aspect ratio and fine pitchinterconnects offering 1000+ memory-logic IO in aconventional package footprint. The design,assembly and reliability details will be discussed. ThexFD is a memory stacking scheme that offers multipleDRAM chips in a package while maintaining the highperformance of a single chip package. Designs andproducts ranging from high capacity DIMMs to DIMM-in-a-package modules will be shown in detail. Insummary, it will be shown that high performance canstill be extracted utilizing conventional packaginginfrastructure to meet the requirements of cloudcomputing.

THURSDAY January 24, 2013SCV Components, Packaging and Manufacturing Technology

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Combating Cyber Attacks:Using a 288-core Server

Speaker: Tom DeCanio, Networking & SecurityApplications Architect, Tilera Corporation

Time: Networking/Refreshments at 6:30 PM;Presentation at 7:00 PM

Cost: nonePlace: Cadence, Bldg 10, 2655 Seely Ave, San

JoseRSVP: from websiteWeb: sites.ieee.org/scv-cs

Tom DeCanio has more than 25 years in softwaredevelopment specializing in network communicationsand security applications. At Tilera Corporation, thedeveloper of the highest performance, low powergeneral purpose manycore processors, Tom is incharge of developing and maintaining the port ofSuricata IDS/IPS for the Tilera TILE-Gx processorfamily. Tom is also working closely with severalcustomers on their application development efforts.He is also a Qosmos Expert Developer (QED) partnerdeveloping applications utilizing Qosmos DPIsoftware (ixEngine).

Tom holds a bachelors of science in computerscience from the University of Illinois at Urbana-Champaign.

Tilera processors provide a standard Linuxplatform, which can process very high throughputnetwork traffic. With cyber attacks becoming morefrequent, organized and costly in the damage theyinflict on governments, businesses, and criticalinfrastructure, there is a significant need for hardwareand software that can process live network traffic andprevent such attacks. The combination of Suricata, ahigh performance network intrusion detection andprevention system sponsored by the US governmentand the Tilera-based platforms, compacting up to 288cores and 32 10Gbps ports in a 1U chassis, providesthe highest performance and performance-per-watt-per-rack-unit system designed to detect and preventmalware, botnets, spyware, spam, worms, backdoorexploits, Trojans and zombie machines.

This talk will examine, in detail, how the features ofthe TILE-GX processor and the on-chip meshintelligent packet processor (mPIPE) are leveraged toimplement the Suricata functions and deliver highperformance.

TUESDAY February 12, 2013SCV Computer

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Advanced Organic Substrate Technologies to Enable Extreme

Electronics Miniaturization

Speaker: Susan Bagen, Business Development Manager and Sr. Field Applications Engineer, Endicott Interconnect Technologies, Inc.

Time: Optional dinner at 6:00 PM; Presentation at 6:45 PM

Cost: $20 for dinner ($10 for students, unemployed); no cost for presentation

Place: Biltmore Hotel, 2151 Laurelwood Rd, Santa Clara

RSVP: from website Web: www.cpmt.org/scv Susan Bagen currently fulfills a dual role as a Business Development Manager and Sr. Field Applications Engineer for Endicott Interconnect Technologies, Inc. where she is focused on high reliability markets including medical and military. She has 25 years of experience in the development of microelectronic packaging solutions for military, medical and commercial applications. Prior to EI, Susan was an independent industry consultant for 14 years, and held positions with both Texas Instruments and Dow Chemical. She has a B.S. in Chemical Engineering from Case Western Reserve University. Susan is a licensed professional engineer in the state of Texas. She is a long-time member of technical committees for the International Microelectronics and Packaging Society and the Symposium on Polymers in Microelectronics (IMAPS), and is currently Program Chair for the IEEE EMBS (Engineering in Medicine & Biology Society) Dallas Chapter. She holds 5 U.S patents and has a number of publications.

Electronics packaging technologies for today’s high reliability markets including high performance computing, military and medical are driving advancements toward increased functionality with decreasing degrees of size, weight and power (SWaP). A key enabling technology towards achieving SWaP is the substrate technology used. Standard printed circuit boards (PWBs) utilize dielectric materials containing glass cloth, which can limit circuit density and performance, as well as inhibit the ability to achieve reliable assemblies with bare semiconductor die components. Ceramic substrates often used in lieu of PWBs for chip packaging have disadvantages of weight, marginal electrical performance and reliability as compared to organic technologies. Alternative materials including thin, particle-containing organic substrates, liquid crystal polymer (LCP) and microflex enable SWaP, while overcoming the limitations of PWBs and ceramic.

This presentation will discuss the use of these alternative organic substrate materials to achieve extreme electronics miniaturization with outstanding electrical performance and high reliability. The effect of substrate type on chip-package interaction (CPI) and resulting reliability will be discussed. System-in-Package (SiP) case studies of real product miniaturization resulting in >27x size reduction for military and high performance computing applications will be presented in detail. Microflex assemblies to achieve extreme miniaturization and atypical form factors driven by implantable and in vivo medical applications will also be discussed. A Package-Interposer-Package configuration to produce 3D assemblies will also be shown.

THURSDAY February 13, 2013

SCV Components, Packaging and Manufacturing Technology

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Review of Contract Languagefor Consultants

Speaker: Jonathan J. Sweet, Esq., Law Officesof Jonathan J. Sweet

Time: Meeting and Presentation at 7:00 PMCost: nonePlace: Agilent, 5301 Stevens Creek Blvd., Santa

ClaraRSVP: not requiredWeb: www.CaliforniaConsultants.org

Jonathan Sweet works forbusiness clients on litigation andtransactional matters. He is theauthor of two books on thesubjects of contracts and avoidinglitigation, and he has taught lawcourses at Lincoln Law School ofSan Jose, San Jose State University (SJSU) and theUniversity of San Francisco (USF).

A key component of Jonathan's legalrepresentation is to put the client's needs first, and totry to make legal services cost-effective. He givespresentations to groups on legal topics, and hascreated a Risk Management Video that addressessome important contractual issues.

Jonathan is available to act as an arbitrator ormediator to help resolve disputes, and can also serveas an expert witness or consultant in litigation. Hereceived his BA from UC Berkeley in 1978 and his JDfrom USF in 1985. He lectures regularly for LormanEducation Services on transactional and litigationmatters.

Consultants regularly require contracts and otherlegal documents. Since the language contained inthese documents can have a substantial impact onthe financial health and well-being of a consultant'sbusiness, a basic understanding of the language canreduce one's liability exposure and legal expenses.

This talk will address the key contract languageand clauses that should be included in numerousdocuments, including the following:

consulting agreements partnership agreements corporation bylaws and articles operating agreements for LLCs covenants not to compete non-disclosure agreements confidentiality agreements licensing agreements for patents, trademarks or

copyrights commercial leases employee manuals (as employer or employee) insurance policiesThis talk will examine sample language and the

issues raised by this language. However, listening tothis talk cannot substitute for the competent legaladvice of a qualified attorney.

TUESDAY February 19, 2013SCV Consultants' Network of Silicon Valley

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New Wafer-Level EmbeddedPackage Structure and

Technology using Large-ScalePanel Assembly

Speaker: Akio Katsumata, General Manager,J-Devices Corporation

Time: Registration at 11:30 AM; Buffet lunch at11:45; Presentation at 12:15 PM

Cost: $15 for lunch ($5 for students,unemployed); no cost for presentation

Place: Biltmore Hotel, 2151 Laurelwood Rd, SantaClara

RSVP: from websiteWeb: www.cpmt.org/scv

Akio Katsumata is the General Manager for thePackaging Research & Development Center atJ-Devices Corporation. He previously spent 23 yearsat Toshiba Corporation as a development researcheron semiconductor package design and new packagedevelopment after graduating from Chiba Universityin Japan. He holds 13 US Patents granted and 4 USPatents filed. He joined J-Devices Corporation in2009.

This presentation describes a new embeddedpackage structure and technology for the nextgeneration of WLP, the Wafer level Fan-Out Package- WFOP™. A face-down mounting style, the WFOPhas a metal stainless steel or copper plate as a basisfor the redistribution interconnection layer. Theredistributed layer is fabricated with a semi-additivecopper plating method. The contact between the diepads and distribution layer is the lead-finger type.

With this structure we reduce fabrication costs byusing large-scale panels and precise redistributioninterconnect controls, and the design rules do notdepend on the die size. Moreover, WFOP hasseveral benefits:

- applicable to 50um pad pitch;- excellent thermal characteristics contributed by

the metal plate; and- noise shielding afforded by the metal plate.Reliability testing has been completed.In this presentation, we describe the WFOP

package structure, process flow, packagecharacteristics and reliability test results anddiscussion.

THURSDAY February 21, 2013SCV Components, Packaging and Manufacturing Technology