Arithmetic circuits

Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2’S Complement

representation 2’S Complement arithmetic Arithmetic building blocks

Powers of 2Powers of 2

20 21

22

23

24

25

26

27 28 29 210 211 212 213 214 215

216

Decimal Equivalent1 248

163264

128 256512

1,024 2,048 4,096 8,192 16,38432,76865,536

Abbreviation

1K 2K 4K8K

16K32K64K

Decimal-Binary EquivalencesDecimal

1 37153163

127 255 511

1,0232,047 4,095 8,191 16,38332,76765,535

Binary1

11 111

11111 1111

11 1111 111 1111

1111 1111 1 1111 1111

11 1111 1111 111 1111 1111

1111 1111 1111 1 1111 1111 1111

11 1111 1111 1111

111 1111 1111 1111

1111 1111 1111 1111

Hexadecimal

137F

1F3F7FFF

1FF3FF7FFFFF

1FFF3FFF7FFFFFFF

Binary addition 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 = 0 + carry of 1 into next

position 1 + 1 + 1 = 11 = 1 + carry of 1 into next

positionA B SUM CO

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

HALF ADDER

A

B

SUM

CO

Carry-Out =

SUM =

(AB)

(AB) + (AB)

Binary addition

Carry-Out =

SUM =

1-bit 8 Strings Full Adder with Carry-In and Carry-Out

CI A B SUM CO

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

FULL ADDER

A

BSUM

COCI

(A B)CI + (A B)CI + +

(AB)CI + (A+B)CI

1-bit 8 Strings Full Adder with Carry-In and Carry-Out

SUM =

FULL ADDER

A

BSUM

COCI

(A B)CI + (A B)CI + +

Carry-Out = (AB)CI + (A+B)CI

Binary addition

Binary Subtraction0 - 0 = 01 - 0 = 11 - 1 = 00 - 1 = 1 ต้องยมืจากหลักท่ีสงูกวา่มา

1

A B SUB BO

0 0 0 0

0 1 1 1

1 0 1 0

1 1 0 0

HALF Subtracto

r

A

B

SUB

BO

Borrow-Out =

SUB =

Binary Subtraction

Borrow-Out =

SUB =

1-bit 8 Strings Full Subtractor with Borrow-In and Borrow -Out

BI A B SUB BO

0 0 0 0 0

0 0 1 1 1

0 1 0 1 0

0 1 1 0 0

1 0 0 1 1

1 0 1 0 1

1 1 0 0 0

1 1 1 1 1

FULL Subtracto

r

A

BSUB

BOBI

REPRESENTING REPRESENTING UNUNSIGNED NUMBERSSIGNED NUMBERS((Absolute valueAbsolute value))

0 0 0 0 0 0 0 0A7 A6 A5 A4 A3 A2 A1 A0

=00H

1 1 1 1 1 1 1 1B7 B6 B5 B4 B3 B2 B1 B0

=FFH

REPRESENTING SIGNED NUMBERSREPRESENTING SIGNED NUMBERSin in sign-magnitudesign-magnitude form. form.

0 0 1 1 0 1 0 0A7 A6 A5 A4 A3 A2 A1 A0

=+5210

SIGN BITMagnitude = 5210

1 0 1 1 0 1 0 0B7 B6 B5 B4 B3 B2 B1 B0

=-5210

SIGN BITMagnitude =

5210

REPRESENTING SIGNED NUMBERSREPRESENTING SIGNED NUMBERSin the in the 22’’ S-complement S-complement system. system.

0 0 1 0 1 1 0 1A7 A6 A5 A4 A3 A2 A1 A0

=+4510

SIGN BITTrue binary

1 1 0 1 0 0 1 1B7 B6 B5 B4 B3 B2 B1 B0

=-4510

SIGN BIT2’s complement

Range of Sign-Magnitude NumbersRange of Sign-Magnitude Numbers

0 0 0 0 0 0 0 1A7 A6 A5 A4 A3 A2 A1 A0

=+110

SIGN BIT

0 1 1 1 1 1 1 1B7 B6 B5 B4 B3 B2 B1 B0

=+1271

0

1 0 0 0 0 0 0 1A7 A6 A5 A4 A3 A2 A1 A0

=-12710

1 1 1 1 1 1 1 1B7 B6 B5 B4 B3 B2 B1 B0

=-110

Range of Sign-Magnitude NumbersRange of Sign-Magnitude Numbers

0 0 0 0 0 0 0 1A7 A6 A5 A4 A3 A2 A1 A0

=+110

SIGN BIT

0 1 1 1 1 1 1 1B7 B6 B5 B4 B3 B2 B1 B0

=+1271

0

1 0 0 0 0 0 0 1A7 A6 A5 A4 A3 A2 A1 A0

=-12710

1 1 1 1 1 1 1 1B7 B6 B5 B4 B3 B2 B1 B0

=-110

การคอมพลีเมนต์เลขฐานการคอมพลีเมนต์เลขฐานสองสอง

แบง่ออกเป็น คอมพลีเมนต์ 1 (1’s complement) คอมพลีเมนต์ 2 (2’s complement) การคอมพลีเมนต์เลขฐานสองนี้นำาไปใชเ้ก่ียวกับ

การคำานวณทางไมโครคอมพวิเตอรม์าก เพราะวา่จะใชใ้นลักษณะการลบด้วยวธิกีารบวกด้วยคอมพลีเมนต์

สรุป การลบด้วยการบวกด้วยคอมพลีเมนต์นัน้จะทำานองเดียวกับการคอมพลีเมนต์เลขฐานสบิ

การคอมพลีเมนต์เลขฐานการคอมพลีเมนต์เลขฐานสองสอง

X3X2X1X0 = 1000

1’s complementX3X2X1X0 = 0111

2’s complement2’s complement = 1’s complement + 1

X3

X3

X2

X2

X1

X1

X0

X0

Positive and Negative NumbersPositive and Negative Numbers

-8 -7 -6 -5 -4 -3 -2 -1 0 +1 +2 +3 +4 +5 +6 +7

1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111

Magnitude Positive Negative12345678

0001001000110100010101100111

-

11111110110111001011101010011000

22’’ S-complement representation S-complement representation summarysummary

Positive numbers always have a sign bit of 0, and negative numbers always have a sign bit of 1.

Positive numbers are stored in sign-magnitude form.

Negative numbers are stored as 2’s complements. Taking the 2’s complement is equivalent to a sign

change.

Example :

Binary contents Hexadecimal contents

Decimal contents

0001 0100____ ________ ________ ____

1001 1110____ ________ ________ ____

___ ___ ___ ___

14HDDH___HBDH___H70H___H6EH

_____H

+20___+47_________

-125___

-19,750

1101 1101 -35 0010 1111 2F 1011 1101 -67 9E -98 0111 0000 +112 1000 0011 83 0110 1110 110 1011 0010 1101 1010 B2DA

CASE 4 Both negative. -43 -78

ADDITIONCASE 1 Both positive.

+83+16

2’s complement arithmetic2’s complement arithmetic

0101 00110001 0000

83 0101 0011+16 +0001 0000 99 0110 0011

CASE 2 Positive and smaller negative.

+125 -68

0111 11011011 1100

125 0111 1101+(-68) +1011 1100 57 1 0011 1001

CASE 3 Positive and larger negative.

+37 -115

37 0010 0101+(-115) +1000 1101 -78 1011 0010

1101 01011011 0010

-43 1101 0101 +(-78) +1011 0010 -121 1 1000 0111

0010 01011000 1101

SUBTRACTIONCASE 1 Both positive.

+83+16

2’s complement arithmetic2’s complement arithmetic

0101 00110001 0000

CASE 2 Positive and smaller negative.

+68 -27 83 0101 0011

+(-16) +1111 0000 67 1 0100 0011

0100 01001110 0101

68 0100 0100+(+27) +0001 1011 95 0101 1111CASE 3 Positive and

larger negative. +14 -108

14 0000 1110+(+108) +0110 1100 122 0111 1010

1101 01011011 0010

CASE 4 Both negative. -43 -78

-43 1101 0101 +(+78) +0100 1110 35 1 0010 0011

0000 11101001 0100

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

INVERT

A7 A6 A5 A4 A3 A2 A1 A0

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0

001

A7-A0 0110 1110Y7-Y0 0110 1110

Y7-Y0 1001 0001

INV LOGIC

Controlled inverterControlled inverter

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

ADD/SUB

A7 A6 A5 A4 A3 A2 A1 A0

S7 S6 S5 S4 S3 S2 S1 S0

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

B7 B6 B5 B4 B3 B2 B1 B0

ADDITION A7 A6 A5 A4 A3 A2 A1 A0

+B7 B6 B5 B4 B3 B2 B1 B0

S7 S6 S5 S4 S3 S2 S1 S0

SUBTRACTION A7 A6 A5 A4 A3 A2 A1 A0

+B7 B6 B5 B4 B3 B2 B1 B0 +1 S7 S6 S5 S4 S3 S2 S1 S0

- - - - - - - -

Binary adder-subtractor diagramBinary adder-subtractor diagram

S8

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

S4 S3 S2 S1

A1A2A3A4B1B2B3B4CIN

COUT

Binary adder-subtractor circuit.Binary adder-subtractor circuit.

7483 7483

ADD/